835 lines · c
1/* SPDX-License-Identifier: GPL-2.02 *3 * Copyright 2016-2018 HabanaLabs, Ltd.4 * All Rights Reserved.5 *6 */7 8/************************************9 ** This is an auto-generated file **10 ** DO NOT EDIT BELOW **11 ************************************/12 13#ifndef ASIC_REG_NIC4_QM1_REGS_H_14#define ASIC_REG_NIC4_QM1_REGS_H_15 16/*17 *****************************************18 * NIC4_QM1 (Prototype: QMAN)19 *****************************************20 */21 22#define mmNIC4_QM1_GLBL_CFG0 0xDE200023 24#define mmNIC4_QM1_GLBL_CFG1 0xDE200425 26#define mmNIC4_QM1_GLBL_PROT 0xDE200827 28#define mmNIC4_QM1_GLBL_ERR_CFG 0xDE200C29 30#define mmNIC4_QM1_GLBL_SECURE_PROPS_0 0xDE201031 32#define mmNIC4_QM1_GLBL_SECURE_PROPS_1 0xDE201433 34#define mmNIC4_QM1_GLBL_SECURE_PROPS_2 0xDE201835 36#define mmNIC4_QM1_GLBL_SECURE_PROPS_3 0xDE201C37 38#define mmNIC4_QM1_GLBL_SECURE_PROPS_4 0xDE202039 40#define mmNIC4_QM1_GLBL_NON_SECURE_PROPS_0 0xDE202441 42#define mmNIC4_QM1_GLBL_NON_SECURE_PROPS_1 0xDE202843 44#define mmNIC4_QM1_GLBL_NON_SECURE_PROPS_2 0xDE202C45 46#define mmNIC4_QM1_GLBL_NON_SECURE_PROPS_3 0xDE203047 48#define mmNIC4_QM1_GLBL_NON_SECURE_PROPS_4 0xDE203449 50#define mmNIC4_QM1_GLBL_STS0 0xDE203851 52#define mmNIC4_QM1_GLBL_STS1_0 0xDE204053 54#define mmNIC4_QM1_GLBL_STS1_1 0xDE204455 56#define mmNIC4_QM1_GLBL_STS1_2 0xDE204857 58#define mmNIC4_QM1_GLBL_STS1_3 0xDE204C59 60#define mmNIC4_QM1_GLBL_STS1_4 0xDE205061 62#define mmNIC4_QM1_GLBL_MSG_EN_0 0xDE205463 64#define mmNIC4_QM1_GLBL_MSG_EN_1 0xDE205865 66#define mmNIC4_QM1_GLBL_MSG_EN_2 0xDE205C67 68#define mmNIC4_QM1_GLBL_MSG_EN_3 0xDE206069 70#define mmNIC4_QM1_GLBL_MSG_EN_4 0xDE206871 72#define mmNIC4_QM1_PQ_BASE_LO_0 0xDE207073 74#define mmNIC4_QM1_PQ_BASE_LO_1 0xDE207475 76#define mmNIC4_QM1_PQ_BASE_LO_2 0xDE207877 78#define mmNIC4_QM1_PQ_BASE_LO_3 0xDE207C79 80#define mmNIC4_QM1_PQ_BASE_HI_0 0xDE208081 82#define mmNIC4_QM1_PQ_BASE_HI_1 0xDE208483 84#define mmNIC4_QM1_PQ_BASE_HI_2 0xDE208885 86#define mmNIC4_QM1_PQ_BASE_HI_3 0xDE208C87 88#define mmNIC4_QM1_PQ_SIZE_0 0xDE209089 90#define mmNIC4_QM1_PQ_SIZE_1 0xDE209491 92#define mmNIC4_QM1_PQ_SIZE_2 0xDE209893 94#define mmNIC4_QM1_PQ_SIZE_3 0xDE209C95 96#define mmNIC4_QM1_PQ_PI_0 0xDE20A097 98#define mmNIC4_QM1_PQ_PI_1 0xDE20A499 100#define mmNIC4_QM1_PQ_PI_2 0xDE20A8101 102#define mmNIC4_QM1_PQ_PI_3 0xDE20AC103 104#define mmNIC4_QM1_PQ_CI_0 0xDE20B0105 106#define mmNIC4_QM1_PQ_CI_1 0xDE20B4107 108#define mmNIC4_QM1_PQ_CI_2 0xDE20B8109 110#define mmNIC4_QM1_PQ_CI_3 0xDE20BC111 112#define mmNIC4_QM1_PQ_CFG0_0 0xDE20C0113 114#define mmNIC4_QM1_PQ_CFG0_1 0xDE20C4115 116#define mmNIC4_QM1_PQ_CFG0_2 0xDE20C8117 118#define mmNIC4_QM1_PQ_CFG0_3 0xDE20CC119 120#define mmNIC4_QM1_PQ_CFG1_0 0xDE20D0121 122#define mmNIC4_QM1_PQ_CFG1_1 0xDE20D4123 124#define mmNIC4_QM1_PQ_CFG1_2 0xDE20D8125 126#define mmNIC4_QM1_PQ_CFG1_3 0xDE20DC127 128#define mmNIC4_QM1_PQ_ARUSER_31_11_0 0xDE20E0129 130#define mmNIC4_QM1_PQ_ARUSER_31_11_1 0xDE20E4131 132#define mmNIC4_QM1_PQ_ARUSER_31_11_2 0xDE20E8133 134#define mmNIC4_QM1_PQ_ARUSER_31_11_3 0xDE20EC135 136#define mmNIC4_QM1_PQ_STS0_0 0xDE20F0137 138#define mmNIC4_QM1_PQ_STS0_1 0xDE20F4139 140#define mmNIC4_QM1_PQ_STS0_2 0xDE20F8141 142#define mmNIC4_QM1_PQ_STS0_3 0xDE20FC143 144#define mmNIC4_QM1_PQ_STS1_0 0xDE2100145 146#define mmNIC4_QM1_PQ_STS1_1 0xDE2104147 148#define mmNIC4_QM1_PQ_STS1_2 0xDE2108149 150#define mmNIC4_QM1_PQ_STS1_3 0xDE210C151 152#define mmNIC4_QM1_CQ_CFG0_0 0xDE2110153 154#define mmNIC4_QM1_CQ_CFG0_1 0xDE2114155 156#define mmNIC4_QM1_CQ_CFG0_2 0xDE2118157 158#define mmNIC4_QM1_CQ_CFG0_3 0xDE211C159 160#define mmNIC4_QM1_CQ_CFG0_4 0xDE2120161 162#define mmNIC4_QM1_CQ_CFG1_0 0xDE2124163 164#define mmNIC4_QM1_CQ_CFG1_1 0xDE2128165 166#define mmNIC4_QM1_CQ_CFG1_2 0xDE212C167 168#define mmNIC4_QM1_CQ_CFG1_3 0xDE2130169 170#define mmNIC4_QM1_CQ_CFG1_4 0xDE2134171 172#define mmNIC4_QM1_CQ_ARUSER_31_11_0 0xDE2138173 174#define mmNIC4_QM1_CQ_ARUSER_31_11_1 0xDE213C175 176#define mmNIC4_QM1_CQ_ARUSER_31_11_2 0xDE2140177 178#define mmNIC4_QM1_CQ_ARUSER_31_11_3 0xDE2144179 180#define mmNIC4_QM1_CQ_ARUSER_31_11_4 0xDE2148181 182#define mmNIC4_QM1_CQ_STS0_0 0xDE214C183 184#define mmNIC4_QM1_CQ_STS0_1 0xDE2150185 186#define mmNIC4_QM1_CQ_STS0_2 0xDE2154187 188#define mmNIC4_QM1_CQ_STS0_3 0xDE2158189 190#define mmNIC4_QM1_CQ_STS0_4 0xDE215C191 192#define mmNIC4_QM1_CQ_STS1_0 0xDE2160193 194#define mmNIC4_QM1_CQ_STS1_1 0xDE2164195 196#define mmNIC4_QM1_CQ_STS1_2 0xDE2168197 198#define mmNIC4_QM1_CQ_STS1_3 0xDE216C199 200#define mmNIC4_QM1_CQ_STS1_4 0xDE2170201 202#define mmNIC4_QM1_CQ_PTR_LO_0 0xDE2174203 204#define mmNIC4_QM1_CQ_PTR_HI_0 0xDE2178205 206#define mmNIC4_QM1_CQ_TSIZE_0 0xDE217C207 208#define mmNIC4_QM1_CQ_CTL_0 0xDE2180209 210#define mmNIC4_QM1_CQ_PTR_LO_1 0xDE2184211 212#define mmNIC4_QM1_CQ_PTR_HI_1 0xDE2188213 214#define mmNIC4_QM1_CQ_TSIZE_1 0xDE218C215 216#define mmNIC4_QM1_CQ_CTL_1 0xDE2190217 218#define mmNIC4_QM1_CQ_PTR_LO_2 0xDE2194219 220#define mmNIC4_QM1_CQ_PTR_HI_2 0xDE2198221 222#define mmNIC4_QM1_CQ_TSIZE_2 0xDE219C223 224#define mmNIC4_QM1_CQ_CTL_2 0xDE21A0225 226#define mmNIC4_QM1_CQ_PTR_LO_3 0xDE21A4227 228#define mmNIC4_QM1_CQ_PTR_HI_3 0xDE21A8229 230#define mmNIC4_QM1_CQ_TSIZE_3 0xDE21AC231 232#define mmNIC4_QM1_CQ_CTL_3 0xDE21B0233 234#define mmNIC4_QM1_CQ_PTR_LO_4 0xDE21B4235 236#define mmNIC4_QM1_CQ_PTR_HI_4 0xDE21B8237 238#define mmNIC4_QM1_CQ_TSIZE_4 0xDE21BC239 240#define mmNIC4_QM1_CQ_CTL_4 0xDE21C0241 242#define mmNIC4_QM1_CQ_PTR_LO_STS_0 0xDE21C4243 244#define mmNIC4_QM1_CQ_PTR_LO_STS_1 0xDE21C8245 246#define mmNIC4_QM1_CQ_PTR_LO_STS_2 0xDE21CC247 248#define mmNIC4_QM1_CQ_PTR_LO_STS_3 0xDE21D0249 250#define mmNIC4_QM1_CQ_PTR_LO_STS_4 0xDE21D4251 252#define mmNIC4_QM1_CQ_PTR_HI_STS_0 0xDE21D8253 254#define mmNIC4_QM1_CQ_PTR_HI_STS_1 0xDE21DC255 256#define mmNIC4_QM1_CQ_PTR_HI_STS_2 0xDE21E0257 258#define mmNIC4_QM1_CQ_PTR_HI_STS_3 0xDE21E4259 260#define mmNIC4_QM1_CQ_PTR_HI_STS_4 0xDE21E8261 262#define mmNIC4_QM1_CQ_TSIZE_STS_0 0xDE21EC263 264#define mmNIC4_QM1_CQ_TSIZE_STS_1 0xDE21F0265 266#define mmNIC4_QM1_CQ_TSIZE_STS_2 0xDE21F4267 268#define mmNIC4_QM1_CQ_TSIZE_STS_3 0xDE21F8269 270#define mmNIC4_QM1_CQ_TSIZE_STS_4 0xDE21FC271 272#define mmNIC4_QM1_CQ_CTL_STS_0 0xDE2200273 274#define mmNIC4_QM1_CQ_CTL_STS_1 0xDE2204275 276#define mmNIC4_QM1_CQ_CTL_STS_2 0xDE2208277 278#define mmNIC4_QM1_CQ_CTL_STS_3 0xDE220C279 280#define mmNIC4_QM1_CQ_CTL_STS_4 0xDE2210281 282#define mmNIC4_QM1_CQ_IFIFO_CNT_0 0xDE2214283 284#define mmNIC4_QM1_CQ_IFIFO_CNT_1 0xDE2218285 286#define mmNIC4_QM1_CQ_IFIFO_CNT_2 0xDE221C287 288#define mmNIC4_QM1_CQ_IFIFO_CNT_3 0xDE2220289 290#define mmNIC4_QM1_CQ_IFIFO_CNT_4 0xDE2224291 292#define mmNIC4_QM1_CP_MSG_BASE0_ADDR_LO_0 0xDE2228293 294#define mmNIC4_QM1_CP_MSG_BASE0_ADDR_LO_1 0xDE222C295 296#define mmNIC4_QM1_CP_MSG_BASE0_ADDR_LO_2 0xDE2230297 298#define mmNIC4_QM1_CP_MSG_BASE0_ADDR_LO_3 0xDE2234299 300#define mmNIC4_QM1_CP_MSG_BASE0_ADDR_LO_4 0xDE2238301 302#define mmNIC4_QM1_CP_MSG_BASE0_ADDR_HI_0 0xDE223C303 304#define mmNIC4_QM1_CP_MSG_BASE0_ADDR_HI_1 0xDE2240305 306#define mmNIC4_QM1_CP_MSG_BASE0_ADDR_HI_2 0xDE2244307 308#define mmNIC4_QM1_CP_MSG_BASE0_ADDR_HI_3 0xDE2248309 310#define mmNIC4_QM1_CP_MSG_BASE0_ADDR_HI_4 0xDE224C311 312#define mmNIC4_QM1_CP_MSG_BASE1_ADDR_LO_0 0xDE2250313 314#define mmNIC4_QM1_CP_MSG_BASE1_ADDR_LO_1 0xDE2254315 316#define mmNIC4_QM1_CP_MSG_BASE1_ADDR_LO_2 0xDE2258317 318#define mmNIC4_QM1_CP_MSG_BASE1_ADDR_LO_3 0xDE225C319 320#define mmNIC4_QM1_CP_MSG_BASE1_ADDR_LO_4 0xDE2260321 322#define mmNIC4_QM1_CP_MSG_BASE1_ADDR_HI_0 0xDE2264323 324#define mmNIC4_QM1_CP_MSG_BASE1_ADDR_HI_1 0xDE2268325 326#define mmNIC4_QM1_CP_MSG_BASE1_ADDR_HI_2 0xDE226C327 328#define mmNIC4_QM1_CP_MSG_BASE1_ADDR_HI_3 0xDE2270329 330#define mmNIC4_QM1_CP_MSG_BASE1_ADDR_HI_4 0xDE2274331 332#define mmNIC4_QM1_CP_MSG_BASE2_ADDR_LO_0 0xDE2278333 334#define mmNIC4_QM1_CP_MSG_BASE2_ADDR_LO_1 0xDE227C335 336#define mmNIC4_QM1_CP_MSG_BASE2_ADDR_LO_2 0xDE2280337 338#define mmNIC4_QM1_CP_MSG_BASE2_ADDR_LO_3 0xDE2284339 340#define mmNIC4_QM1_CP_MSG_BASE2_ADDR_LO_4 0xDE2288341 342#define mmNIC4_QM1_CP_MSG_BASE2_ADDR_HI_0 0xDE228C343 344#define mmNIC4_QM1_CP_MSG_BASE2_ADDR_HI_1 0xDE2290345 346#define mmNIC4_QM1_CP_MSG_BASE2_ADDR_HI_2 0xDE2294347 348#define mmNIC4_QM1_CP_MSG_BASE2_ADDR_HI_3 0xDE2298349 350#define mmNIC4_QM1_CP_MSG_BASE2_ADDR_HI_4 0xDE229C351 352#define mmNIC4_QM1_CP_MSG_BASE3_ADDR_LO_0 0xDE22A0353 354#define mmNIC4_QM1_CP_MSG_BASE3_ADDR_LO_1 0xDE22A4355 356#define mmNIC4_QM1_CP_MSG_BASE3_ADDR_LO_2 0xDE22A8357 358#define mmNIC4_QM1_CP_MSG_BASE3_ADDR_LO_3 0xDE22AC359 360#define mmNIC4_QM1_CP_MSG_BASE3_ADDR_LO_4 0xDE22B0361 362#define mmNIC4_QM1_CP_MSG_BASE3_ADDR_HI_0 0xDE22B4363 364#define mmNIC4_QM1_CP_MSG_BASE3_ADDR_HI_1 0xDE22B8365 366#define mmNIC4_QM1_CP_MSG_BASE3_ADDR_HI_2 0xDE22BC367 368#define mmNIC4_QM1_CP_MSG_BASE3_ADDR_HI_3 0xDE22C0369 370#define mmNIC4_QM1_CP_MSG_BASE3_ADDR_HI_4 0xDE22C4371 372#define mmNIC4_QM1_CP_LDMA_TSIZE_OFFSET_0 0xDE22C8373 374#define mmNIC4_QM1_CP_LDMA_TSIZE_OFFSET_1 0xDE22CC375 376#define mmNIC4_QM1_CP_LDMA_TSIZE_OFFSET_2 0xDE22D0377 378#define mmNIC4_QM1_CP_LDMA_TSIZE_OFFSET_3 0xDE22D4379 380#define mmNIC4_QM1_CP_LDMA_TSIZE_OFFSET_4 0xDE22D8381 382#define mmNIC4_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_0 0xDE22E0383 384#define mmNIC4_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_1 0xDE22E4385 386#define mmNIC4_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_2 0xDE22E8387 388#define mmNIC4_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_3 0xDE22EC389 390#define mmNIC4_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_4 0xDE22F0391 392#define mmNIC4_QM1_CP_LDMA_DST_BASE_LO_OFFSET_0 0xDE22F4393 394#define mmNIC4_QM1_CP_LDMA_DST_BASE_LO_OFFSET_1 0xDE22F8395 396#define mmNIC4_QM1_CP_LDMA_DST_BASE_LO_OFFSET_2 0xDE22FC397 398#define mmNIC4_QM1_CP_LDMA_DST_BASE_LO_OFFSET_3 0xDE2300399 400#define mmNIC4_QM1_CP_LDMA_DST_BASE_LO_OFFSET_4 0xDE2304401 402#define mmNIC4_QM1_CP_FENCE0_RDATA_0 0xDE2308403 404#define mmNIC4_QM1_CP_FENCE0_RDATA_1 0xDE230C405 406#define mmNIC4_QM1_CP_FENCE0_RDATA_2 0xDE2310407 408#define mmNIC4_QM1_CP_FENCE0_RDATA_3 0xDE2314409 410#define mmNIC4_QM1_CP_FENCE0_RDATA_4 0xDE2318411 412#define mmNIC4_QM1_CP_FENCE1_RDATA_0 0xDE231C413 414#define mmNIC4_QM1_CP_FENCE1_RDATA_1 0xDE2320415 416#define mmNIC4_QM1_CP_FENCE1_RDATA_2 0xDE2324417 418#define mmNIC4_QM1_CP_FENCE1_RDATA_3 0xDE2328419 420#define mmNIC4_QM1_CP_FENCE1_RDATA_4 0xDE232C421 422#define mmNIC4_QM1_CP_FENCE2_RDATA_0 0xDE2330423 424#define mmNIC4_QM1_CP_FENCE2_RDATA_1 0xDE2334425 426#define mmNIC4_QM1_CP_FENCE2_RDATA_2 0xDE2338427 428#define mmNIC4_QM1_CP_FENCE2_RDATA_3 0xDE233C429 430#define mmNIC4_QM1_CP_FENCE2_RDATA_4 0xDE2340431 432#define mmNIC4_QM1_CP_FENCE3_RDATA_0 0xDE2344433 434#define mmNIC4_QM1_CP_FENCE3_RDATA_1 0xDE2348435 436#define mmNIC4_QM1_CP_FENCE3_RDATA_2 0xDE234C437 438#define mmNIC4_QM1_CP_FENCE3_RDATA_3 0xDE2350439 440#define mmNIC4_QM1_CP_FENCE3_RDATA_4 0xDE2354441 442#define mmNIC4_QM1_CP_FENCE0_CNT_0 0xDE2358443 444#define mmNIC4_QM1_CP_FENCE0_CNT_1 0xDE235C445 446#define mmNIC4_QM1_CP_FENCE0_CNT_2 0xDE2360447 448#define mmNIC4_QM1_CP_FENCE0_CNT_3 0xDE2364449 450#define mmNIC4_QM1_CP_FENCE0_CNT_4 0xDE2368451 452#define mmNIC4_QM1_CP_FENCE1_CNT_0 0xDE236C453 454#define mmNIC4_QM1_CP_FENCE1_CNT_1 0xDE2370455 456#define mmNIC4_QM1_CP_FENCE1_CNT_2 0xDE2374457 458#define mmNIC4_QM1_CP_FENCE1_CNT_3 0xDE2378459 460#define mmNIC4_QM1_CP_FENCE1_CNT_4 0xDE237C461 462#define mmNIC4_QM1_CP_FENCE2_CNT_0 0xDE2380463 464#define mmNIC4_QM1_CP_FENCE2_CNT_1 0xDE2384465 466#define mmNIC4_QM1_CP_FENCE2_CNT_2 0xDE2388467 468#define mmNIC4_QM1_CP_FENCE2_CNT_3 0xDE238C469 470#define mmNIC4_QM1_CP_FENCE2_CNT_4 0xDE2390471 472#define mmNIC4_QM1_CP_FENCE3_CNT_0 0xDE2394473 474#define mmNIC4_QM1_CP_FENCE3_CNT_1 0xDE2398475 476#define mmNIC4_QM1_CP_FENCE3_CNT_2 0xDE239C477 478#define mmNIC4_QM1_CP_FENCE3_CNT_3 0xDE23A0479 480#define mmNIC4_QM1_CP_FENCE3_CNT_4 0xDE23A4481 482#define mmNIC4_QM1_CP_STS_0 0xDE23A8483 484#define mmNIC4_QM1_CP_STS_1 0xDE23AC485 486#define mmNIC4_QM1_CP_STS_2 0xDE23B0487 488#define mmNIC4_QM1_CP_STS_3 0xDE23B4489 490#define mmNIC4_QM1_CP_STS_4 0xDE23B8491 492#define mmNIC4_QM1_CP_CURRENT_INST_LO_0 0xDE23BC493 494#define mmNIC4_QM1_CP_CURRENT_INST_LO_1 0xDE23C0495 496#define mmNIC4_QM1_CP_CURRENT_INST_LO_2 0xDE23C4497 498#define mmNIC4_QM1_CP_CURRENT_INST_LO_3 0xDE23C8499 500#define mmNIC4_QM1_CP_CURRENT_INST_LO_4 0xDE23CC501 502#define mmNIC4_QM1_CP_CURRENT_INST_HI_0 0xDE23D0503 504#define mmNIC4_QM1_CP_CURRENT_INST_HI_1 0xDE23D4505 506#define mmNIC4_QM1_CP_CURRENT_INST_HI_2 0xDE23D8507 508#define mmNIC4_QM1_CP_CURRENT_INST_HI_3 0xDE23DC509 510#define mmNIC4_QM1_CP_CURRENT_INST_HI_4 0xDE23E0511 512#define mmNIC4_QM1_CP_BARRIER_CFG_0 0xDE23F4513 514#define mmNIC4_QM1_CP_BARRIER_CFG_1 0xDE23F8515 516#define mmNIC4_QM1_CP_BARRIER_CFG_2 0xDE23FC517 518#define mmNIC4_QM1_CP_BARRIER_CFG_3 0xDE2400519 520#define mmNIC4_QM1_CP_BARRIER_CFG_4 0xDE2404521 522#define mmNIC4_QM1_CP_DBG_0_0 0xDE2408523 524#define mmNIC4_QM1_CP_DBG_0_1 0xDE240C525 526#define mmNIC4_QM1_CP_DBG_0_2 0xDE2410527 528#define mmNIC4_QM1_CP_DBG_0_3 0xDE2414529 530#define mmNIC4_QM1_CP_DBG_0_4 0xDE2418531 532#define mmNIC4_QM1_CP_ARUSER_31_11_0 0xDE241C533 534#define mmNIC4_QM1_CP_ARUSER_31_11_1 0xDE2420535 536#define mmNIC4_QM1_CP_ARUSER_31_11_2 0xDE2424537 538#define mmNIC4_QM1_CP_ARUSER_31_11_3 0xDE2428539 540#define mmNIC4_QM1_CP_ARUSER_31_11_4 0xDE242C541 542#define mmNIC4_QM1_CP_AWUSER_31_11_0 0xDE2430543 544#define mmNIC4_QM1_CP_AWUSER_31_11_1 0xDE2434545 546#define mmNIC4_QM1_CP_AWUSER_31_11_2 0xDE2438547 548#define mmNIC4_QM1_CP_AWUSER_31_11_3 0xDE243C549 550#define mmNIC4_QM1_CP_AWUSER_31_11_4 0xDE2440551 552#define mmNIC4_QM1_ARB_CFG_0 0xDE2A00553 554#define mmNIC4_QM1_ARB_CHOISE_Q_PUSH 0xDE2A04555 556#define mmNIC4_QM1_ARB_WRR_WEIGHT_0 0xDE2A08557 558#define mmNIC4_QM1_ARB_WRR_WEIGHT_1 0xDE2A0C559 560#define mmNIC4_QM1_ARB_WRR_WEIGHT_2 0xDE2A10561 562#define mmNIC4_QM1_ARB_WRR_WEIGHT_3 0xDE2A14563 564#define mmNIC4_QM1_ARB_CFG_1 0xDE2A18565 566#define mmNIC4_QM1_ARB_MST_AVAIL_CRED_0 0xDE2A20567 568#define mmNIC4_QM1_ARB_MST_AVAIL_CRED_1 0xDE2A24569 570#define mmNIC4_QM1_ARB_MST_AVAIL_CRED_2 0xDE2A28571 572#define mmNIC4_QM1_ARB_MST_AVAIL_CRED_3 0xDE2A2C573 574#define mmNIC4_QM1_ARB_MST_AVAIL_CRED_4 0xDE2A30575 576#define mmNIC4_QM1_ARB_MST_AVAIL_CRED_5 0xDE2A34577 578#define mmNIC4_QM1_ARB_MST_AVAIL_CRED_6 0xDE2A38579 580#define mmNIC4_QM1_ARB_MST_AVAIL_CRED_7 0xDE2A3C581 582#define mmNIC4_QM1_ARB_MST_AVAIL_CRED_8 0xDE2A40583 584#define mmNIC4_QM1_ARB_MST_AVAIL_CRED_9 0xDE2A44585 586#define mmNIC4_QM1_ARB_MST_AVAIL_CRED_10 0xDE2A48587 588#define mmNIC4_QM1_ARB_MST_AVAIL_CRED_11 0xDE2A4C589 590#define mmNIC4_QM1_ARB_MST_AVAIL_CRED_12 0xDE2A50591 592#define mmNIC4_QM1_ARB_MST_AVAIL_CRED_13 0xDE2A54593 594#define mmNIC4_QM1_ARB_MST_AVAIL_CRED_14 0xDE2A58595 596#define mmNIC4_QM1_ARB_MST_AVAIL_CRED_15 0xDE2A5C597 598#define mmNIC4_QM1_ARB_MST_AVAIL_CRED_16 0xDE2A60599 600#define mmNIC4_QM1_ARB_MST_AVAIL_CRED_17 0xDE2A64601 602#define mmNIC4_QM1_ARB_MST_AVAIL_CRED_18 0xDE2A68603 604#define mmNIC4_QM1_ARB_MST_AVAIL_CRED_19 0xDE2A6C605 606#define mmNIC4_QM1_ARB_MST_AVAIL_CRED_20 0xDE2A70607 608#define mmNIC4_QM1_ARB_MST_AVAIL_CRED_21 0xDE2A74609 610#define mmNIC4_QM1_ARB_MST_AVAIL_CRED_22 0xDE2A78611 612#define mmNIC4_QM1_ARB_MST_AVAIL_CRED_23 0xDE2A7C613 614#define mmNIC4_QM1_ARB_MST_AVAIL_CRED_24 0xDE2A80615 616#define mmNIC4_QM1_ARB_MST_AVAIL_CRED_25 0xDE2A84617 618#define mmNIC4_QM1_ARB_MST_AVAIL_CRED_26 0xDE2A88619 620#define mmNIC4_QM1_ARB_MST_AVAIL_CRED_27 0xDE2A8C621 622#define mmNIC4_QM1_ARB_MST_AVAIL_CRED_28 0xDE2A90623 624#define mmNIC4_QM1_ARB_MST_AVAIL_CRED_29 0xDE2A94625 626#define mmNIC4_QM1_ARB_MST_AVAIL_CRED_30 0xDE2A98627 628#define mmNIC4_QM1_ARB_MST_AVAIL_CRED_31 0xDE2A9C629 630#define mmNIC4_QM1_ARB_MST_CRED_INC 0xDE2AA0631 632#define mmNIC4_QM1_ARB_MST_CHOISE_PUSH_OFST_0 0xDE2AA4633 634#define mmNIC4_QM1_ARB_MST_CHOISE_PUSH_OFST_1 0xDE2AA8635 636#define mmNIC4_QM1_ARB_MST_CHOISE_PUSH_OFST_2 0xDE2AAC637 638#define mmNIC4_QM1_ARB_MST_CHOISE_PUSH_OFST_3 0xDE2AB0639 640#define mmNIC4_QM1_ARB_MST_CHOISE_PUSH_OFST_4 0xDE2AB4641 642#define mmNIC4_QM1_ARB_MST_CHOISE_PUSH_OFST_5 0xDE2AB8643 644#define mmNIC4_QM1_ARB_MST_CHOISE_PUSH_OFST_6 0xDE2ABC645 646#define mmNIC4_QM1_ARB_MST_CHOISE_PUSH_OFST_7 0xDE2AC0647 648#define mmNIC4_QM1_ARB_MST_CHOISE_PUSH_OFST_8 0xDE2AC4649 650#define mmNIC4_QM1_ARB_MST_CHOISE_PUSH_OFST_9 0xDE2AC8651 652#define mmNIC4_QM1_ARB_MST_CHOISE_PUSH_OFST_10 0xDE2ACC653 654#define mmNIC4_QM1_ARB_MST_CHOISE_PUSH_OFST_11 0xDE2AD0655 656#define mmNIC4_QM1_ARB_MST_CHOISE_PUSH_OFST_12 0xDE2AD4657 658#define mmNIC4_QM1_ARB_MST_CHOISE_PUSH_OFST_13 0xDE2AD8659 660#define mmNIC4_QM1_ARB_MST_CHOISE_PUSH_OFST_14 0xDE2ADC661 662#define mmNIC4_QM1_ARB_MST_CHOISE_PUSH_OFST_15 0xDE2AE0663 664#define mmNIC4_QM1_ARB_MST_CHOISE_PUSH_OFST_16 0xDE2AE4665 666#define mmNIC4_QM1_ARB_MST_CHOISE_PUSH_OFST_17 0xDE2AE8667 668#define mmNIC4_QM1_ARB_MST_CHOISE_PUSH_OFST_18 0xDE2AEC669 670#define mmNIC4_QM1_ARB_MST_CHOISE_PUSH_OFST_19 0xDE2AF0671 672#define mmNIC4_QM1_ARB_MST_CHOISE_PUSH_OFST_20 0xDE2AF4673 674#define mmNIC4_QM1_ARB_MST_CHOISE_PUSH_OFST_21 0xDE2AF8675 676#define mmNIC4_QM1_ARB_MST_CHOISE_PUSH_OFST_22 0xDE2AFC677 678#define mmNIC4_QM1_ARB_MST_CHOISE_PUSH_OFST_23 0xDE2B00679 680#define mmNIC4_QM1_ARB_MST_CHOISE_PUSH_OFST_24 0xDE2B04681 682#define mmNIC4_QM1_ARB_MST_CHOISE_PUSH_OFST_25 0xDE2B08683 684#define mmNIC4_QM1_ARB_MST_CHOISE_PUSH_OFST_26 0xDE2B0C685 686#define mmNIC4_QM1_ARB_MST_CHOISE_PUSH_OFST_27 0xDE2B10687 688#define mmNIC4_QM1_ARB_MST_CHOISE_PUSH_OFST_28 0xDE2B14689 690#define mmNIC4_QM1_ARB_MST_CHOISE_PUSH_OFST_29 0xDE2B18691 692#define mmNIC4_QM1_ARB_MST_CHOISE_PUSH_OFST_30 0xDE2B1C693 694#define mmNIC4_QM1_ARB_MST_CHOISE_PUSH_OFST_31 0xDE2B20695 696#define mmNIC4_QM1_ARB_SLV_MASTER_INC_CRED_OFST 0xDE2B28697 698#define mmNIC4_QM1_ARB_MST_SLAVE_EN 0xDE2B2C699 700#define mmNIC4_QM1_ARB_MST_QUIET_PER 0xDE2B34701 702#define mmNIC4_QM1_ARB_SLV_CHOISE_WDT 0xDE2B38703 704#define mmNIC4_QM1_ARB_SLV_ID 0xDE2B3C705 706#define mmNIC4_QM1_ARB_MSG_MAX_INFLIGHT 0xDE2B44707 708#define mmNIC4_QM1_ARB_MSG_AWUSER_31_11 0xDE2B48709 710#define mmNIC4_QM1_ARB_MSG_AWUSER_SEC_PROP 0xDE2B4C711 712#define mmNIC4_QM1_ARB_MSG_AWUSER_NON_SEC_PROP 0xDE2B50713 714#define mmNIC4_QM1_ARB_BASE_LO 0xDE2B54715 716#define mmNIC4_QM1_ARB_BASE_HI 0xDE2B58717 718#define mmNIC4_QM1_ARB_STATE_STS 0xDE2B80719 720#define mmNIC4_QM1_ARB_CHOISE_FULLNESS_STS 0xDE2B84721 722#define mmNIC4_QM1_ARB_MSG_STS 0xDE2B88723 724#define mmNIC4_QM1_ARB_SLV_CHOISE_Q_HEAD 0xDE2B8C725 726#define mmNIC4_QM1_ARB_ERR_CAUSE 0xDE2B9C727 728#define mmNIC4_QM1_ARB_ERR_MSG_EN 0xDE2BA0729 730#define mmNIC4_QM1_ARB_ERR_STS_DRP 0xDE2BA8731 732#define mmNIC4_QM1_ARB_MST_CRED_STS_0 0xDE2BB0733 734#define mmNIC4_QM1_ARB_MST_CRED_STS_1 0xDE2BB4735 736#define mmNIC4_QM1_ARB_MST_CRED_STS_2 0xDE2BB8737 738#define mmNIC4_QM1_ARB_MST_CRED_STS_3 0xDE2BBC739 740#define mmNIC4_QM1_ARB_MST_CRED_STS_4 0xDE2BC0741 742#define mmNIC4_QM1_ARB_MST_CRED_STS_5 0xDE2BC4743 744#define mmNIC4_QM1_ARB_MST_CRED_STS_6 0xDE2BC8745 746#define mmNIC4_QM1_ARB_MST_CRED_STS_7 0xDE2BCC747 748#define mmNIC4_QM1_ARB_MST_CRED_STS_8 0xDE2BD0749 750#define mmNIC4_QM1_ARB_MST_CRED_STS_9 0xDE2BD4751 752#define mmNIC4_QM1_ARB_MST_CRED_STS_10 0xDE2BD8753 754#define mmNIC4_QM1_ARB_MST_CRED_STS_11 0xDE2BDC755 756#define mmNIC4_QM1_ARB_MST_CRED_STS_12 0xDE2BE0757 758#define mmNIC4_QM1_ARB_MST_CRED_STS_13 0xDE2BE4759 760#define mmNIC4_QM1_ARB_MST_CRED_STS_14 0xDE2BE8761 762#define mmNIC4_QM1_ARB_MST_CRED_STS_15 0xDE2BEC763 764#define mmNIC4_QM1_ARB_MST_CRED_STS_16 0xDE2BF0765 766#define mmNIC4_QM1_ARB_MST_CRED_STS_17 0xDE2BF4767 768#define mmNIC4_QM1_ARB_MST_CRED_STS_18 0xDE2BF8769 770#define mmNIC4_QM1_ARB_MST_CRED_STS_19 0xDE2BFC771 772#define mmNIC4_QM1_ARB_MST_CRED_STS_20 0xDE2C00773 774#define mmNIC4_QM1_ARB_MST_CRED_STS_21 0xDE2C04775 776#define mmNIC4_QM1_ARB_MST_CRED_STS_22 0xDE2C08777 778#define mmNIC4_QM1_ARB_MST_CRED_STS_23 0xDE2C0C779 780#define mmNIC4_QM1_ARB_MST_CRED_STS_24 0xDE2C10781 782#define mmNIC4_QM1_ARB_MST_CRED_STS_25 0xDE2C14783 784#define mmNIC4_QM1_ARB_MST_CRED_STS_26 0xDE2C18785 786#define mmNIC4_QM1_ARB_MST_CRED_STS_27 0xDE2C1C787 788#define mmNIC4_QM1_ARB_MST_CRED_STS_28 0xDE2C20789 790#define mmNIC4_QM1_ARB_MST_CRED_STS_29 0xDE2C24791 792#define mmNIC4_QM1_ARB_MST_CRED_STS_30 0xDE2C28793 794#define mmNIC4_QM1_ARB_MST_CRED_STS_31 0xDE2C2C795 796#define mmNIC4_QM1_CGM_CFG 0xDE2C70797 798#define mmNIC4_QM1_CGM_STS 0xDE2C74799 800#define mmNIC4_QM1_CGM_CFG1 0xDE2C78801 802#define mmNIC4_QM1_LOCAL_RANGE_BASE 0xDE2C80803 804#define mmNIC4_QM1_LOCAL_RANGE_SIZE 0xDE2C84805 806#define mmNIC4_QM1_CSMR_STRICT_PRIO_CFG 0xDE2C90807 808#define mmNIC4_QM1_HBW_RD_RATE_LIM_CFG_1 0xDE2C94809 810#define mmNIC4_QM1_LBW_WR_RATE_LIM_CFG_0 0xDE2C98811 812#define mmNIC4_QM1_LBW_WR_RATE_LIM_CFG_1 0xDE2C9C813 814#define mmNIC4_QM1_HBW_RD_RATE_LIM_CFG_0 0xDE2CA0815 816#define mmNIC4_QM1_GLBL_AXCACHE 0xDE2CA4817 818#define mmNIC4_QM1_IND_GW_APB_CFG 0xDE2CB0819 820#define mmNIC4_QM1_IND_GW_APB_WDATA 0xDE2CB4821 822#define mmNIC4_QM1_IND_GW_APB_RDATA 0xDE2CB8823 824#define mmNIC4_QM1_IND_GW_APB_STATUS 0xDE2CBC825 826#define mmNIC4_QM1_GLBL_ERR_ADDR_LO 0xDE2CD0827 828#define mmNIC4_QM1_GLBL_ERR_ADDR_HI 0xDE2CD4829 830#define mmNIC4_QM1_GLBL_ERR_WDATA 0xDE2CD8831 832#define mmNIC4_QM1_GLBL_MEM_INIT_BUSY 0xDE2D00833 834#endif /* ASIC_REG_NIC4_QM1_REGS_H_ */835