1227 lines · c
1/* SPDX-License-Identifier: GPL-2.02 *3 * Copyright 2016-2018 HabanaLabs, Ltd.4 * All Rights Reserved.5 *6 */7 8/************************************9 ** This is an auto-generated file **10 ** DO NOT EDIT BELOW **11 ************************************/12 13#ifndef ASIC_REG_TPC0_CFG_REGS_H_14#define ASIC_REG_TPC0_CFG_REGS_H_15 16/*17 *****************************************18 * TPC0_CFG (Prototype: TPC)19 *****************************************20 */21 22#define mmTPC0_CFG_KERNEL_TENSOR_0_BASE_ADDR_LOW 0xE0640023 24#define mmTPC0_CFG_KERNEL_TENSOR_0_BASE_ADDR_HIGH 0xE0640425 26#define mmTPC0_CFG_KERNEL_TENSOR_0_PADDING_VALUE 0xE0640827 28#define mmTPC0_CFG_KERNEL_TENSOR_0_TENSOR_CONFIG 0xE0640C29 30#define mmTPC0_CFG_KERNEL_TENSOR_0_DIM_0_SIZE 0xE0641031 32#define mmTPC0_CFG_KERNEL_TENSOR_0_DIM_0_STRIDE 0xE0641433 34#define mmTPC0_CFG_KERNEL_TENSOR_0_DIM_1_SIZE 0xE0641835 36#define mmTPC0_CFG_KERNEL_TENSOR_0_DIM_1_STRIDE 0xE0641C37 38#define mmTPC0_CFG_KERNEL_TENSOR_0_DIM_2_SIZE 0xE0642039 40#define mmTPC0_CFG_KERNEL_TENSOR_0_DIM_2_STRIDE 0xE0642441 42#define mmTPC0_CFG_KERNEL_TENSOR_0_DIM_3_SIZE 0xE0642843 44#define mmTPC0_CFG_KERNEL_TENSOR_0_DIM_3_STRIDE 0xE0642C45 46#define mmTPC0_CFG_KERNEL_TENSOR_0_DIM_4_SIZE 0xE0643047 48#define mmTPC0_CFG_KERNEL_TENSOR_0_DIM_4_STRIDE 0xE0643449 50#define mmTPC0_CFG_KERNEL_TENSOR_1_BASE_ADDR_LOW 0xE0643851 52#define mmTPC0_CFG_KERNEL_TENSOR_1_BASE_ADDR_HIGH 0xE0643C53 54#define mmTPC0_CFG_KERNEL_TENSOR_1_PADDING_VALUE 0xE0644055 56#define mmTPC0_CFG_KERNEL_TENSOR_1_TENSOR_CONFIG 0xE0644457 58#define mmTPC0_CFG_KERNEL_TENSOR_1_DIM_0_SIZE 0xE0644859 60#define mmTPC0_CFG_KERNEL_TENSOR_1_DIM_0_STRIDE 0xE0644C61 62#define mmTPC0_CFG_KERNEL_TENSOR_1_DIM_1_SIZE 0xE0645063 64#define mmTPC0_CFG_KERNEL_TENSOR_1_DIM_1_STRIDE 0xE0645465 66#define mmTPC0_CFG_KERNEL_TENSOR_1_DIM_2_SIZE 0xE0645867 68#define mmTPC0_CFG_KERNEL_TENSOR_1_DIM_2_STRIDE 0xE0645C69 70#define mmTPC0_CFG_KERNEL_TENSOR_1_DIM_3_SIZE 0xE0646071 72#define mmTPC0_CFG_KERNEL_TENSOR_1_DIM_3_STRIDE 0xE0646473 74#define mmTPC0_CFG_KERNEL_TENSOR_1_DIM_4_SIZE 0xE0646875 76#define mmTPC0_CFG_KERNEL_TENSOR_1_DIM_4_STRIDE 0xE0646C77 78#define mmTPC0_CFG_KERNEL_TENSOR_2_BASE_ADDR_LOW 0xE0647079 80#define mmTPC0_CFG_KERNEL_TENSOR_2_BASE_ADDR_HIGH 0xE0647481 82#define mmTPC0_CFG_KERNEL_TENSOR_2_PADDING_VALUE 0xE0647883 84#define mmTPC0_CFG_KERNEL_TENSOR_2_TENSOR_CONFIG 0xE0647C85 86#define mmTPC0_CFG_KERNEL_TENSOR_2_DIM_0_SIZE 0xE0648087 88#define mmTPC0_CFG_KERNEL_TENSOR_2_DIM_0_STRIDE 0xE0648489 90#define mmTPC0_CFG_KERNEL_TENSOR_2_DIM_1_SIZE 0xE0648891 92#define mmTPC0_CFG_KERNEL_TENSOR_2_DIM_1_STRIDE 0xE0648C93 94#define mmTPC0_CFG_KERNEL_TENSOR_2_DIM_2_SIZE 0xE0649095 96#define mmTPC0_CFG_KERNEL_TENSOR_2_DIM_2_STRIDE 0xE0649497 98#define mmTPC0_CFG_KERNEL_TENSOR_2_DIM_3_SIZE 0xE0649899 100#define mmTPC0_CFG_KERNEL_TENSOR_2_DIM_3_STRIDE 0xE0649C101 102#define mmTPC0_CFG_KERNEL_TENSOR_2_DIM_4_SIZE 0xE064A0103 104#define mmTPC0_CFG_KERNEL_TENSOR_2_DIM_4_STRIDE 0xE064A4105 106#define mmTPC0_CFG_KERNEL_TENSOR_3_BASE_ADDR_LOW 0xE064A8107 108#define mmTPC0_CFG_KERNEL_TENSOR_3_BASE_ADDR_HIGH 0xE064AC109 110#define mmTPC0_CFG_KERNEL_TENSOR_3_PADDING_VALUE 0xE064B0111 112#define mmTPC0_CFG_KERNEL_TENSOR_3_TENSOR_CONFIG 0xE064B4113 114#define mmTPC0_CFG_KERNEL_TENSOR_3_DIM_0_SIZE 0xE064B8115 116#define mmTPC0_CFG_KERNEL_TENSOR_3_DIM_0_STRIDE 0xE064BC117 118#define mmTPC0_CFG_KERNEL_TENSOR_3_DIM_1_SIZE 0xE064C0119 120#define mmTPC0_CFG_KERNEL_TENSOR_3_DIM_1_STRIDE 0xE064C4121 122#define mmTPC0_CFG_KERNEL_TENSOR_3_DIM_2_SIZE 0xE064C8123 124#define mmTPC0_CFG_KERNEL_TENSOR_3_DIM_2_STRIDE 0xE064CC125 126#define mmTPC0_CFG_KERNEL_TENSOR_3_DIM_3_SIZE 0xE064D0127 128#define mmTPC0_CFG_KERNEL_TENSOR_3_DIM_3_STRIDE 0xE064D4129 130#define mmTPC0_CFG_KERNEL_TENSOR_3_DIM_4_SIZE 0xE064D8131 132#define mmTPC0_CFG_KERNEL_TENSOR_3_DIM_4_STRIDE 0xE064DC133 134#define mmTPC0_CFG_KERNEL_TENSOR_4_BASE_ADDR_LOW 0xE064E0135 136#define mmTPC0_CFG_KERNEL_TENSOR_4_BASE_ADDR_HIGH 0xE064E4137 138#define mmTPC0_CFG_KERNEL_TENSOR_4_PADDING_VALUE 0xE064E8139 140#define mmTPC0_CFG_KERNEL_TENSOR_4_TENSOR_CONFIG 0xE064EC141 142#define mmTPC0_CFG_KERNEL_TENSOR_4_DIM_0_SIZE 0xE064F0143 144#define mmTPC0_CFG_KERNEL_TENSOR_4_DIM_0_STRIDE 0xE064F4145 146#define mmTPC0_CFG_KERNEL_TENSOR_4_DIM_1_SIZE 0xE064F8147 148#define mmTPC0_CFG_KERNEL_TENSOR_4_DIM_1_STRIDE 0xE064FC149 150#define mmTPC0_CFG_KERNEL_TENSOR_4_DIM_2_SIZE 0xE06500151 152#define mmTPC0_CFG_KERNEL_TENSOR_4_DIM_2_STRIDE 0xE06504153 154#define mmTPC0_CFG_KERNEL_TENSOR_4_DIM_3_SIZE 0xE06508155 156#define mmTPC0_CFG_KERNEL_TENSOR_4_DIM_3_STRIDE 0xE0650C157 158#define mmTPC0_CFG_KERNEL_TENSOR_4_DIM_4_SIZE 0xE06510159 160#define mmTPC0_CFG_KERNEL_TENSOR_4_DIM_4_STRIDE 0xE06514161 162#define mmTPC0_CFG_KERNEL_TENSOR_5_BASE_ADDR_LOW 0xE06518163 164#define mmTPC0_CFG_KERNEL_TENSOR_5_BASE_ADDR_HIGH 0xE0651C165 166#define mmTPC0_CFG_KERNEL_TENSOR_5_PADDING_VALUE 0xE06520167 168#define mmTPC0_CFG_KERNEL_TENSOR_5_TENSOR_CONFIG 0xE06524169 170#define mmTPC0_CFG_KERNEL_TENSOR_5_DIM_0_SIZE 0xE06528171 172#define mmTPC0_CFG_KERNEL_TENSOR_5_DIM_0_STRIDE 0xE0652C173 174#define mmTPC0_CFG_KERNEL_TENSOR_5_DIM_1_SIZE 0xE06530175 176#define mmTPC0_CFG_KERNEL_TENSOR_5_DIM_1_STRIDE 0xE06534177 178#define mmTPC0_CFG_KERNEL_TENSOR_5_DIM_2_SIZE 0xE06538179 180#define mmTPC0_CFG_KERNEL_TENSOR_5_DIM_2_STRIDE 0xE0653C181 182#define mmTPC0_CFG_KERNEL_TENSOR_5_DIM_3_SIZE 0xE06540183 184#define mmTPC0_CFG_KERNEL_TENSOR_5_DIM_3_STRIDE 0xE06544185 186#define mmTPC0_CFG_KERNEL_TENSOR_5_DIM_4_SIZE 0xE06548187 188#define mmTPC0_CFG_KERNEL_TENSOR_5_DIM_4_STRIDE 0xE0654C189 190#define mmTPC0_CFG_KERNEL_TENSOR_6_BASE_ADDR_LOW 0xE06550191 192#define mmTPC0_CFG_KERNEL_TENSOR_6_BASE_ADDR_HIGH 0xE06554193 194#define mmTPC0_CFG_KERNEL_TENSOR_6_PADDING_VALUE 0xE06558195 196#define mmTPC0_CFG_KERNEL_TENSOR_6_TENSOR_CONFIG 0xE0655C197 198#define mmTPC0_CFG_KERNEL_TENSOR_6_DIM_0_SIZE 0xE06560199 200#define mmTPC0_CFG_KERNEL_TENSOR_6_DIM_0_STRIDE 0xE06564201 202#define mmTPC0_CFG_KERNEL_TENSOR_6_DIM_1_SIZE 0xE06568203 204#define mmTPC0_CFG_KERNEL_TENSOR_6_DIM_1_STRIDE 0xE0656C205 206#define mmTPC0_CFG_KERNEL_TENSOR_6_DIM_2_SIZE 0xE06570207 208#define mmTPC0_CFG_KERNEL_TENSOR_6_DIM_2_STRIDE 0xE06574209 210#define mmTPC0_CFG_KERNEL_TENSOR_6_DIM_3_SIZE 0xE06578211 212#define mmTPC0_CFG_KERNEL_TENSOR_6_DIM_3_STRIDE 0xE0657C213 214#define mmTPC0_CFG_KERNEL_TENSOR_6_DIM_4_SIZE 0xE06580215 216#define mmTPC0_CFG_KERNEL_TENSOR_6_DIM_4_STRIDE 0xE06584217 218#define mmTPC0_CFG_KERNEL_TENSOR_7_BASE_ADDR_LOW 0xE06588219 220#define mmTPC0_CFG_KERNEL_TENSOR_7_BASE_ADDR_HIGH 0xE0658C221 222#define mmTPC0_CFG_KERNEL_TENSOR_7_PADDING_VALUE 0xE06590223 224#define mmTPC0_CFG_KERNEL_TENSOR_7_TENSOR_CONFIG 0xE06594225 226#define mmTPC0_CFG_KERNEL_TENSOR_7_DIM_0_SIZE 0xE06598227 228#define mmTPC0_CFG_KERNEL_TENSOR_7_DIM_0_STRIDE 0xE0659C229 230#define mmTPC0_CFG_KERNEL_TENSOR_7_DIM_1_SIZE 0xE065A0231 232#define mmTPC0_CFG_KERNEL_TENSOR_7_DIM_1_STRIDE 0xE065A4233 234#define mmTPC0_CFG_KERNEL_TENSOR_7_DIM_2_SIZE 0xE065A8235 236#define mmTPC0_CFG_KERNEL_TENSOR_7_DIM_2_STRIDE 0xE065AC237 238#define mmTPC0_CFG_KERNEL_TENSOR_7_DIM_3_SIZE 0xE065B0239 240#define mmTPC0_CFG_KERNEL_TENSOR_7_DIM_3_STRIDE 0xE065B4241 242#define mmTPC0_CFG_KERNEL_TENSOR_7_DIM_4_SIZE 0xE065B8243 244#define mmTPC0_CFG_KERNEL_TENSOR_7_DIM_4_STRIDE 0xE065BC245 246#define mmTPC0_CFG_KERNEL_TENSOR_8_BASE_ADDR_LOW 0xE065C0247 248#define mmTPC0_CFG_KERNEL_TENSOR_8_BASE_ADDR_HIGH 0xE065C4249 250#define mmTPC0_CFG_KERNEL_TENSOR_8_PADDING_VALUE 0xE065C8251 252#define mmTPC0_CFG_KERNEL_TENSOR_8_TENSOR_CONFIG 0xE065CC253 254#define mmTPC0_CFG_KERNEL_TENSOR_8_DIM_0_SIZE 0xE065D0255 256#define mmTPC0_CFG_KERNEL_TENSOR_8_DIM_0_STRIDE 0xE065D4257 258#define mmTPC0_CFG_KERNEL_TENSOR_8_DIM_1_SIZE 0xE065D8259 260#define mmTPC0_CFG_KERNEL_TENSOR_8_DIM_1_STRIDE 0xE065DC261 262#define mmTPC0_CFG_KERNEL_TENSOR_8_DIM_2_SIZE 0xE065E0263 264#define mmTPC0_CFG_KERNEL_TENSOR_8_DIM_2_STRIDE 0xE065E4265 266#define mmTPC0_CFG_KERNEL_TENSOR_8_DIM_3_SIZE 0xE065E8267 268#define mmTPC0_CFG_KERNEL_TENSOR_8_DIM_3_STRIDE 0xE065EC269 270#define mmTPC0_CFG_KERNEL_TENSOR_8_DIM_4_SIZE 0xE065F0271 272#define mmTPC0_CFG_KERNEL_TENSOR_8_DIM_4_STRIDE 0xE065F4273 274#define mmTPC0_CFG_KERNEL_TENSOR_9_BASE_ADDR_LOW 0xE065F8275 276#define mmTPC0_CFG_KERNEL_TENSOR_9_BASE_ADDR_HIGH 0xE065FC277 278#define mmTPC0_CFG_KERNEL_TENSOR_9_PADDING_VALUE 0xE06600279 280#define mmTPC0_CFG_KERNEL_TENSOR_9_TENSOR_CONFIG 0xE06604281 282#define mmTPC0_CFG_KERNEL_TENSOR_9_DIM_0_SIZE 0xE06608283 284#define mmTPC0_CFG_KERNEL_TENSOR_9_DIM_0_STRIDE 0xE0660C285 286#define mmTPC0_CFG_KERNEL_TENSOR_9_DIM_1_SIZE 0xE06610287 288#define mmTPC0_CFG_KERNEL_TENSOR_9_DIM_1_STRIDE 0xE06614289 290#define mmTPC0_CFG_KERNEL_TENSOR_9_DIM_2_SIZE 0xE06618291 292#define mmTPC0_CFG_KERNEL_TENSOR_9_DIM_2_STRIDE 0xE0661C293 294#define mmTPC0_CFG_KERNEL_TENSOR_9_DIM_3_SIZE 0xE06620295 296#define mmTPC0_CFG_KERNEL_TENSOR_9_DIM_3_STRIDE 0xE06624297 298#define mmTPC0_CFG_KERNEL_TENSOR_9_DIM_4_SIZE 0xE06628299 300#define mmTPC0_CFG_KERNEL_TENSOR_9_DIM_4_STRIDE 0xE0662C301 302#define mmTPC0_CFG_KERNEL_TENSOR_10_BASE_ADDR_LOW 0xE06630303 304#define mmTPC0_CFG_KERNEL_TENSOR_10_BASE_ADDR_HIGH 0xE06634305 306#define mmTPC0_CFG_KERNEL_TENSOR_10_PADDING_VALUE 0xE06638307 308#define mmTPC0_CFG_KERNEL_TENSOR_10_TENSOR_CONFIG 0xE0663C309 310#define mmTPC0_CFG_KERNEL_TENSOR_10_DIM_0_SIZE 0xE06640311 312#define mmTPC0_CFG_KERNEL_TENSOR_10_DIM_0_STRIDE 0xE06644313 314#define mmTPC0_CFG_KERNEL_TENSOR_10_DIM_1_SIZE 0xE06648315 316#define mmTPC0_CFG_KERNEL_TENSOR_10_DIM_1_STRIDE 0xE0664C317 318#define mmTPC0_CFG_KERNEL_TENSOR_10_DIM_2_SIZE 0xE06650319 320#define mmTPC0_CFG_KERNEL_TENSOR_10_DIM_2_STRIDE 0xE06654321 322#define mmTPC0_CFG_KERNEL_TENSOR_10_DIM_3_SIZE 0xE06658323 324#define mmTPC0_CFG_KERNEL_TENSOR_10_DIM_3_STRIDE 0xE0665C325 326#define mmTPC0_CFG_KERNEL_TENSOR_10_DIM_4_SIZE 0xE06660327 328#define mmTPC0_CFG_KERNEL_TENSOR_10_DIM_4_STRIDE 0xE06664329 330#define mmTPC0_CFG_KERNEL_TENSOR_11_BASE_ADDR_LOW 0xE06668331 332#define mmTPC0_CFG_KERNEL_TENSOR_11_BASE_ADDR_HIGH 0xE0666C333 334#define mmTPC0_CFG_KERNEL_TENSOR_11_PADDING_VALUE 0xE06670335 336#define mmTPC0_CFG_KERNEL_TENSOR_11_TENSOR_CONFIG 0xE06674337 338#define mmTPC0_CFG_KERNEL_TENSOR_11_DIM_0_SIZE 0xE06678339 340#define mmTPC0_CFG_KERNEL_TENSOR_11_DIM_0_STRIDE 0xE0667C341 342#define mmTPC0_CFG_KERNEL_TENSOR_11_DIM_1_SIZE 0xE06680343 344#define mmTPC0_CFG_KERNEL_TENSOR_11_DIM_1_STRIDE 0xE06684345 346#define mmTPC0_CFG_KERNEL_TENSOR_11_DIM_2_SIZE 0xE06688347 348#define mmTPC0_CFG_KERNEL_TENSOR_11_DIM_2_STRIDE 0xE0668C349 350#define mmTPC0_CFG_KERNEL_TENSOR_11_DIM_3_SIZE 0xE06690351 352#define mmTPC0_CFG_KERNEL_TENSOR_11_DIM_3_STRIDE 0xE06694353 354#define mmTPC0_CFG_KERNEL_TENSOR_11_DIM_4_SIZE 0xE06698355 356#define mmTPC0_CFG_KERNEL_TENSOR_11_DIM_4_STRIDE 0xE0669C357 358#define mmTPC0_CFG_KERNEL_TENSOR_12_BASE_ADDR_LOW 0xE066A0359 360#define mmTPC0_CFG_KERNEL_TENSOR_12_BASE_ADDR_HIGH 0xE066A4361 362#define mmTPC0_CFG_KERNEL_TENSOR_12_PADDING_VALUE 0xE066A8363 364#define mmTPC0_CFG_KERNEL_TENSOR_12_TENSOR_CONFIG 0xE066AC365 366#define mmTPC0_CFG_KERNEL_TENSOR_12_DIM_0_SIZE 0xE066B0367 368#define mmTPC0_CFG_KERNEL_TENSOR_12_DIM_0_STRIDE 0xE066B4369 370#define mmTPC0_CFG_KERNEL_TENSOR_12_DIM_1_SIZE 0xE066B8371 372#define mmTPC0_CFG_KERNEL_TENSOR_12_DIM_1_STRIDE 0xE066BC373 374#define mmTPC0_CFG_KERNEL_TENSOR_12_DIM_2_SIZE 0xE066C0375 376#define mmTPC0_CFG_KERNEL_TENSOR_12_DIM_2_STRIDE 0xE066C4377 378#define mmTPC0_CFG_KERNEL_TENSOR_12_DIM_3_SIZE 0xE066C8379 380#define mmTPC0_CFG_KERNEL_TENSOR_12_DIM_3_STRIDE 0xE066CC381 382#define mmTPC0_CFG_KERNEL_TENSOR_12_DIM_4_SIZE 0xE066D0383 384#define mmTPC0_CFG_KERNEL_TENSOR_12_DIM_4_STRIDE 0xE066D4385 386#define mmTPC0_CFG_KERNEL_TENSOR_13_BASE_ADDR_LOW 0xE066D8387 388#define mmTPC0_CFG_KERNEL_TENSOR_13_BASE_ADDR_HIGH 0xE066DC389 390#define mmTPC0_CFG_KERNEL_TENSOR_13_PADDING_VALUE 0xE066E0391 392#define mmTPC0_CFG_KERNEL_TENSOR_13_TENSOR_CONFIG 0xE066E4393 394#define mmTPC0_CFG_KERNEL_TENSOR_13_DIM_0_SIZE 0xE066E8395 396#define mmTPC0_CFG_KERNEL_TENSOR_13_DIM_0_STRIDE 0xE066EC397 398#define mmTPC0_CFG_KERNEL_TENSOR_13_DIM_1_SIZE 0xE066F0399 400#define mmTPC0_CFG_KERNEL_TENSOR_13_DIM_1_STRIDE 0xE066F4401 402#define mmTPC0_CFG_KERNEL_TENSOR_13_DIM_2_SIZE 0xE066F8403 404#define mmTPC0_CFG_KERNEL_TENSOR_13_DIM_2_STRIDE 0xE066FC405 406#define mmTPC0_CFG_KERNEL_TENSOR_13_DIM_3_SIZE 0xE06700407 408#define mmTPC0_CFG_KERNEL_TENSOR_13_DIM_3_STRIDE 0xE06704409 410#define mmTPC0_CFG_KERNEL_TENSOR_13_DIM_4_SIZE 0xE06708411 412#define mmTPC0_CFG_KERNEL_TENSOR_13_DIM_4_STRIDE 0xE0670C413 414#define mmTPC0_CFG_KERNEL_TENSOR_14_BASE_ADDR_LOW 0xE06710415 416#define mmTPC0_CFG_KERNEL_TENSOR_14_BASE_ADDR_HIGH 0xE06714417 418#define mmTPC0_CFG_KERNEL_TENSOR_14_PADDING_VALUE 0xE06718419 420#define mmTPC0_CFG_KERNEL_TENSOR_14_TENSOR_CONFIG 0xE0671C421 422#define mmTPC0_CFG_KERNEL_TENSOR_14_DIM_0_SIZE 0xE06720423 424#define mmTPC0_CFG_KERNEL_TENSOR_14_DIM_0_STRIDE 0xE06724425 426#define mmTPC0_CFG_KERNEL_TENSOR_14_DIM_1_SIZE 0xE06728427 428#define mmTPC0_CFG_KERNEL_TENSOR_14_DIM_1_STRIDE 0xE0672C429 430#define mmTPC0_CFG_KERNEL_TENSOR_14_DIM_2_SIZE 0xE06730431 432#define mmTPC0_CFG_KERNEL_TENSOR_14_DIM_2_STRIDE 0xE06734433 434#define mmTPC0_CFG_KERNEL_TENSOR_14_DIM_3_SIZE 0xE06738435 436#define mmTPC0_CFG_KERNEL_TENSOR_14_DIM_3_STRIDE 0xE0673C437 438#define mmTPC0_CFG_KERNEL_TENSOR_14_DIM_4_SIZE 0xE06740439 440#define mmTPC0_CFG_KERNEL_TENSOR_14_DIM_4_STRIDE 0xE06744441 442#define mmTPC0_CFG_KERNEL_TENSOR_15_BASE_ADDR_LOW 0xE06748443 444#define mmTPC0_CFG_KERNEL_TENSOR_15_BASE_ADDR_HIGH 0xE0674C445 446#define mmTPC0_CFG_KERNEL_TENSOR_15_PADDING_VALUE 0xE06750447 448#define mmTPC0_CFG_KERNEL_TENSOR_15_TENSOR_CONFIG 0xE06754449 450#define mmTPC0_CFG_KERNEL_TENSOR_15_DIM_0_SIZE 0xE06758451 452#define mmTPC0_CFG_KERNEL_TENSOR_15_DIM_0_STRIDE 0xE0675C453 454#define mmTPC0_CFG_KERNEL_TENSOR_15_DIM_1_SIZE 0xE06760455 456#define mmTPC0_CFG_KERNEL_TENSOR_15_DIM_1_STRIDE 0xE06764457 458#define mmTPC0_CFG_KERNEL_TENSOR_15_DIM_2_SIZE 0xE06768459 460#define mmTPC0_CFG_KERNEL_TENSOR_15_DIM_2_STRIDE 0xE0676C461 462#define mmTPC0_CFG_KERNEL_TENSOR_15_DIM_3_SIZE 0xE06770463 464#define mmTPC0_CFG_KERNEL_TENSOR_15_DIM_3_STRIDE 0xE06774465 466#define mmTPC0_CFG_KERNEL_TENSOR_15_DIM_4_SIZE 0xE06778467 468#define mmTPC0_CFG_KERNEL_TENSOR_15_DIM_4_STRIDE 0xE0677C469 470#define mmTPC0_CFG_KERNEL_SYNC_OBJECT_MESSAGE 0xE06780471 472#define mmTPC0_CFG_KERNEL_SYNC_OBJECT_ADDR 0xE06784473 474#define mmTPC0_CFG_KERNEL_KERNEL_BASE_ADDRESS_LOW 0xE06788475 476#define mmTPC0_CFG_KERNEL_KERNEL_BASE_ADDRESS_HIGH 0xE0678C477 478#define mmTPC0_CFG_KERNEL_TID_BASE_DIM_0 0xE06790479 480#define mmTPC0_CFG_KERNEL_TID_SIZE_DIM_0 0xE06794481 482#define mmTPC0_CFG_KERNEL_TID_BASE_DIM_1 0xE06798483 484#define mmTPC0_CFG_KERNEL_TID_SIZE_DIM_1 0xE0679C485 486#define mmTPC0_CFG_KERNEL_TID_BASE_DIM_2 0xE067A0487 488#define mmTPC0_CFG_KERNEL_TID_SIZE_DIM_2 0xE067A4489 490#define mmTPC0_CFG_KERNEL_TID_BASE_DIM_3 0xE067A8491 492#define mmTPC0_CFG_KERNEL_TID_SIZE_DIM_3 0xE067AC493 494#define mmTPC0_CFG_KERNEL_TID_BASE_DIM_4 0xE067B0495 496#define mmTPC0_CFG_KERNEL_TID_SIZE_DIM_4 0xE067B4497 498#define mmTPC0_CFG_KERNEL_KERNEL_CONFIG 0xE067B8499 500#define mmTPC0_CFG_KERNEL_KERNEL_ID 0xE067BC501 502#define mmTPC0_CFG_KERNEL_SRF_0 0xE067C0503 504#define mmTPC0_CFG_KERNEL_SRF_1 0xE067C4505 506#define mmTPC0_CFG_KERNEL_SRF_2 0xE067C8507 508#define mmTPC0_CFG_KERNEL_SRF_3 0xE067CC509 510#define mmTPC0_CFG_KERNEL_SRF_4 0xE067D0511 512#define mmTPC0_CFG_KERNEL_SRF_5 0xE067D4513 514#define mmTPC0_CFG_KERNEL_SRF_6 0xE067D8515 516#define mmTPC0_CFG_KERNEL_SRF_7 0xE067DC517 518#define mmTPC0_CFG_KERNEL_SRF_8 0xE067E0519 520#define mmTPC0_CFG_KERNEL_SRF_9 0xE067E4521 522#define mmTPC0_CFG_KERNEL_SRF_10 0xE067E8523 524#define mmTPC0_CFG_KERNEL_SRF_11 0xE067EC525 526#define mmTPC0_CFG_KERNEL_SRF_12 0xE067F0527 528#define mmTPC0_CFG_KERNEL_SRF_13 0xE067F4529 530#define mmTPC0_CFG_KERNEL_SRF_14 0xE067F8531 532#define mmTPC0_CFG_KERNEL_SRF_15 0xE067FC533 534#define mmTPC0_CFG_KERNEL_SRF_16 0xE06800535 536#define mmTPC0_CFG_KERNEL_SRF_17 0xE06804537 538#define mmTPC0_CFG_KERNEL_SRF_18 0xE06808539 540#define mmTPC0_CFG_KERNEL_SRF_19 0xE0680C541 542#define mmTPC0_CFG_KERNEL_SRF_20 0xE06810543 544#define mmTPC0_CFG_KERNEL_SRF_21 0xE06814545 546#define mmTPC0_CFG_KERNEL_SRF_22 0xE06818547 548#define mmTPC0_CFG_KERNEL_SRF_23 0xE0681C549 550#define mmTPC0_CFG_KERNEL_SRF_24 0xE06820551 552#define mmTPC0_CFG_KERNEL_SRF_25 0xE06824553 554#define mmTPC0_CFG_KERNEL_SRF_26 0xE06828555 556#define mmTPC0_CFG_KERNEL_SRF_27 0xE0682C557 558#define mmTPC0_CFG_KERNEL_SRF_28 0xE06830559 560#define mmTPC0_CFG_KERNEL_SRF_29 0xE06834561 562#define mmTPC0_CFG_KERNEL_SRF_30 0xE06838563 564#define mmTPC0_CFG_KERNEL_SRF_31 0xE0683C565 566#define mmTPC0_CFG_ROUND_CSR 0xE068FC567 568#define mmTPC0_CFG_PROT 0xE06900569 570#define mmTPC0_CFG_SEMAPHORE 0xE06908571 572#define mmTPC0_CFG_VFLAGS 0xE0690C573 574#define mmTPC0_CFG_SFLAGS 0xE06910575 576#define mmTPC0_CFG_LFSR_POLYNOM 0xE06918577 578#define mmTPC0_CFG_STATUS 0xE0691C579 580#define mmTPC0_CFG_CFG_BASE_ADDRESS_HIGH 0xE06920581 582#define mmTPC0_CFG_CFG_SUBTRACT_VALUE 0xE06924583 584#define mmTPC0_CFG_SM_BASE_ADDRESS_HIGH 0xE0692C585 586#define mmTPC0_CFG_TPC_CMD 0xE06930587 588#define mmTPC0_CFG_TPC_EXECUTE 0xE06938589 590#define mmTPC0_CFG_TPC_STALL 0xE0693C591 592#define mmTPC0_CFG_ICACHE_BASE_ADDERESS_LOW 0xE06940593 594#define mmTPC0_CFG_ICACHE_BASE_ADDERESS_HIGH 0xE06944595 596#define mmTPC0_CFG_RD_RATE_LIMIT 0xE06948597 598#define mmTPC0_CFG_WR_RATE_LIMIT 0xE06950599 600#define mmTPC0_CFG_MSS_CONFIG 0xE06954601 602#define mmTPC0_CFG_TPC_INTR_CAUSE 0xE06958603 604#define mmTPC0_CFG_TPC_INTR_MASK 0xE0695C605 606#define mmTPC0_CFG_WQ_CREDITS 0xE06960607 608#define mmTPC0_CFG_ARUSER_LO 0xE06964609 610#define mmTPC0_CFG_ARUSER_HI 0xE06968611 612#define mmTPC0_CFG_AWUSER_LO 0xE0696C613 614#define mmTPC0_CFG_AWUSER_HI 0xE06970615 616#define mmTPC0_CFG_OPCODE_EXEC 0xE06974617 618#define mmTPC0_CFG_LUT_FUNC32_BASE_ADDR_LO 0xE06978619 620#define mmTPC0_CFG_LUT_FUNC32_BASE_ADDR_HI 0xE0697C621 622#define mmTPC0_CFG_LUT_FUNC64_BASE_ADDR_LO 0xE06980623 624#define mmTPC0_CFG_LUT_FUNC64_BASE_ADDR_HI 0xE06984625 626#define mmTPC0_CFG_LUT_FUNC128_BASE_ADDR_LO 0xE06988627 628#define mmTPC0_CFG_LUT_FUNC128_BASE_ADDR_HI 0xE0698C629 630#define mmTPC0_CFG_LUT_FUNC256_BASE_ADDR_LO 0xE06990631 632#define mmTPC0_CFG_LUT_FUNC256_BASE_ADDR_HI 0xE06994633 634#define mmTPC0_CFG_TSB_CFG_MAX_SIZE 0xE06998635 636#define mmTPC0_CFG_TSB_CFG 0xE0699C637 638#define mmTPC0_CFG_DBGMEM_ADD 0xE069A0639 640#define mmTPC0_CFG_DBGMEM_DATA_WR 0xE069A4641 642#define mmTPC0_CFG_DBGMEM_DATA_RD 0xE069A8643 644#define mmTPC0_CFG_DBGMEM_CTRL 0xE069AC645 646#define mmTPC0_CFG_DBGMEM_RC 0xE069B0647 648#define mmTPC0_CFG_TSB_INFLIGHT_CNTR 0xE069B4649 650#define mmTPC0_CFG_WQ_INFLIGHT_CNTR 0xE069B8651 652#define mmTPC0_CFG_WQ_LBW_TOTAL_CNTR 0xE069BC653 654#define mmTPC0_CFG_WQ_HBW_TOTAL_CNTR 0xE069C0655 656#define mmTPC0_CFG_IRQ_OCCOUPY_CNTR 0xE069C4657 658#define mmTPC0_CFG_FUNC_MBIST_CNTRL 0xE069D0659 660#define mmTPC0_CFG_FUNC_MBIST_PAT 0xE069D4661 662#define mmTPC0_CFG_FUNC_MBIST_MEM_0 0xE069D8663 664#define mmTPC0_CFG_FUNC_MBIST_MEM_1 0xE069DC665 666#define mmTPC0_CFG_FUNC_MBIST_MEM_2 0xE069E0667 668#define mmTPC0_CFG_FUNC_MBIST_MEM_3 0xE069E4669 670#define mmTPC0_CFG_FUNC_MBIST_MEM_4 0xE069E8671 672#define mmTPC0_CFG_FUNC_MBIST_MEM_5 0xE069EC673 674#define mmTPC0_CFG_FUNC_MBIST_MEM_6 0xE069F0675 676#define mmTPC0_CFG_FUNC_MBIST_MEM_7 0xE069F4677 678#define mmTPC0_CFG_FUNC_MBIST_MEM_8 0xE069F8679 680#define mmTPC0_CFG_FUNC_MBIST_MEM_9 0xE069FC681 682#define mmTPC0_CFG_QM_TENSOR_0_BASE_ADDR_LOW 0xE06A00683 684#define mmTPC0_CFG_QM_TENSOR_0_BASE_ADDR_HIGH 0xE06A04685 686#define mmTPC0_CFG_QM_TENSOR_0_PADDING_VALUE 0xE06A08687 688#define mmTPC0_CFG_QM_TENSOR_0_TENSOR_CONFIG 0xE06A0C689 690#define mmTPC0_CFG_QM_TENSOR_0_DIM_0_SIZE 0xE06A10691 692#define mmTPC0_CFG_QM_TENSOR_0_DIM_0_STRIDE 0xE06A14693 694#define mmTPC0_CFG_QM_TENSOR_0_DIM_1_SIZE 0xE06A18695 696#define mmTPC0_CFG_QM_TENSOR_0_DIM_1_STRIDE 0xE06A1C697 698#define mmTPC0_CFG_QM_TENSOR_0_DIM_2_SIZE 0xE06A20699 700#define mmTPC0_CFG_QM_TENSOR_0_DIM_2_STRIDE 0xE06A24701 702#define mmTPC0_CFG_QM_TENSOR_0_DIM_3_SIZE 0xE06A28703 704#define mmTPC0_CFG_QM_TENSOR_0_DIM_3_STRIDE 0xE06A2C705 706#define mmTPC0_CFG_QM_TENSOR_0_DIM_4_SIZE 0xE06A30707 708#define mmTPC0_CFG_QM_TENSOR_0_DIM_4_STRIDE 0xE06A34709 710#define mmTPC0_CFG_QM_TENSOR_1_BASE_ADDR_LOW 0xE06A38711 712#define mmTPC0_CFG_QM_TENSOR_1_BASE_ADDR_HIGH 0xE06A3C713 714#define mmTPC0_CFG_QM_TENSOR_1_PADDING_VALUE 0xE06A40715 716#define mmTPC0_CFG_QM_TENSOR_1_TENSOR_CONFIG 0xE06A44717 718#define mmTPC0_CFG_QM_TENSOR_1_DIM_0_SIZE 0xE06A48719 720#define mmTPC0_CFG_QM_TENSOR_1_DIM_0_STRIDE 0xE06A4C721 722#define mmTPC0_CFG_QM_TENSOR_1_DIM_1_SIZE 0xE06A50723 724#define mmTPC0_CFG_QM_TENSOR_1_DIM_1_STRIDE 0xE06A54725 726#define mmTPC0_CFG_QM_TENSOR_1_DIM_2_SIZE 0xE06A58727 728#define mmTPC0_CFG_QM_TENSOR_1_DIM_2_STRIDE 0xE06A5C729 730#define mmTPC0_CFG_QM_TENSOR_1_DIM_3_SIZE 0xE06A60731 732#define mmTPC0_CFG_QM_TENSOR_1_DIM_3_STRIDE 0xE06A64733 734#define mmTPC0_CFG_QM_TENSOR_1_DIM_4_SIZE 0xE06A68735 736#define mmTPC0_CFG_QM_TENSOR_1_DIM_4_STRIDE 0xE06A6C737 738#define mmTPC0_CFG_QM_TENSOR_2_BASE_ADDR_LOW 0xE06A70739 740#define mmTPC0_CFG_QM_TENSOR_2_BASE_ADDR_HIGH 0xE06A74741 742#define mmTPC0_CFG_QM_TENSOR_2_PADDING_VALUE 0xE06A78743 744#define mmTPC0_CFG_QM_TENSOR_2_TENSOR_CONFIG 0xE06A7C745 746#define mmTPC0_CFG_QM_TENSOR_2_DIM_0_SIZE 0xE06A80747 748#define mmTPC0_CFG_QM_TENSOR_2_DIM_0_STRIDE 0xE06A84749 750#define mmTPC0_CFG_QM_TENSOR_2_DIM_1_SIZE 0xE06A88751 752#define mmTPC0_CFG_QM_TENSOR_2_DIM_1_STRIDE 0xE06A8C753 754#define mmTPC0_CFG_QM_TENSOR_2_DIM_2_SIZE 0xE06A90755 756#define mmTPC0_CFG_QM_TENSOR_2_DIM_2_STRIDE 0xE06A94757 758#define mmTPC0_CFG_QM_TENSOR_2_DIM_3_SIZE 0xE06A98759 760#define mmTPC0_CFG_QM_TENSOR_2_DIM_3_STRIDE 0xE06A9C761 762#define mmTPC0_CFG_QM_TENSOR_2_DIM_4_SIZE 0xE06AA0763 764#define mmTPC0_CFG_QM_TENSOR_2_DIM_4_STRIDE 0xE06AA4765 766#define mmTPC0_CFG_QM_TENSOR_3_BASE_ADDR_LOW 0xE06AA8767 768#define mmTPC0_CFG_QM_TENSOR_3_BASE_ADDR_HIGH 0xE06AAC769 770#define mmTPC0_CFG_QM_TENSOR_3_PADDING_VALUE 0xE06AB0771 772#define mmTPC0_CFG_QM_TENSOR_3_TENSOR_CONFIG 0xE06AB4773 774#define mmTPC0_CFG_QM_TENSOR_3_DIM_0_SIZE 0xE06AB8775 776#define mmTPC0_CFG_QM_TENSOR_3_DIM_0_STRIDE 0xE06ABC777 778#define mmTPC0_CFG_QM_TENSOR_3_DIM_1_SIZE 0xE06AC0779 780#define mmTPC0_CFG_QM_TENSOR_3_DIM_1_STRIDE 0xE06AC4781 782#define mmTPC0_CFG_QM_TENSOR_3_DIM_2_SIZE 0xE06AC8783 784#define mmTPC0_CFG_QM_TENSOR_3_DIM_2_STRIDE 0xE06ACC785 786#define mmTPC0_CFG_QM_TENSOR_3_DIM_3_SIZE 0xE06AD0787 788#define mmTPC0_CFG_QM_TENSOR_3_DIM_3_STRIDE 0xE06AD4789 790#define mmTPC0_CFG_QM_TENSOR_3_DIM_4_SIZE 0xE06AD8791 792#define mmTPC0_CFG_QM_TENSOR_3_DIM_4_STRIDE 0xE06ADC793 794#define mmTPC0_CFG_QM_TENSOR_4_BASE_ADDR_LOW 0xE06AE0795 796#define mmTPC0_CFG_QM_TENSOR_4_BASE_ADDR_HIGH 0xE06AE4797 798#define mmTPC0_CFG_QM_TENSOR_4_PADDING_VALUE 0xE06AE8799 800#define mmTPC0_CFG_QM_TENSOR_4_TENSOR_CONFIG 0xE06AEC801 802#define mmTPC0_CFG_QM_TENSOR_4_DIM_0_SIZE 0xE06AF0803 804#define mmTPC0_CFG_QM_TENSOR_4_DIM_0_STRIDE 0xE06AF4805 806#define mmTPC0_CFG_QM_TENSOR_4_DIM_1_SIZE 0xE06AF8807 808#define mmTPC0_CFG_QM_TENSOR_4_DIM_1_STRIDE 0xE06AFC809 810#define mmTPC0_CFG_QM_TENSOR_4_DIM_2_SIZE 0xE06B00811 812#define mmTPC0_CFG_QM_TENSOR_4_DIM_2_STRIDE 0xE06B04813 814#define mmTPC0_CFG_QM_TENSOR_4_DIM_3_SIZE 0xE06B08815 816#define mmTPC0_CFG_QM_TENSOR_4_DIM_3_STRIDE 0xE06B0C817 818#define mmTPC0_CFG_QM_TENSOR_4_DIM_4_SIZE 0xE06B10819 820#define mmTPC0_CFG_QM_TENSOR_4_DIM_4_STRIDE 0xE06B14821 822#define mmTPC0_CFG_QM_TENSOR_5_BASE_ADDR_LOW 0xE06B18823 824#define mmTPC0_CFG_QM_TENSOR_5_BASE_ADDR_HIGH 0xE06B1C825 826#define mmTPC0_CFG_QM_TENSOR_5_PADDING_VALUE 0xE06B20827 828#define mmTPC0_CFG_QM_TENSOR_5_TENSOR_CONFIG 0xE06B24829 830#define mmTPC0_CFG_QM_TENSOR_5_DIM_0_SIZE 0xE06B28831 832#define mmTPC0_CFG_QM_TENSOR_5_DIM_0_STRIDE 0xE06B2C833 834#define mmTPC0_CFG_QM_TENSOR_5_DIM_1_SIZE 0xE06B30835 836#define mmTPC0_CFG_QM_TENSOR_5_DIM_1_STRIDE 0xE06B34837 838#define mmTPC0_CFG_QM_TENSOR_5_DIM_2_SIZE 0xE06B38839 840#define mmTPC0_CFG_QM_TENSOR_5_DIM_2_STRIDE 0xE06B3C841 842#define mmTPC0_CFG_QM_TENSOR_5_DIM_3_SIZE 0xE06B40843 844#define mmTPC0_CFG_QM_TENSOR_5_DIM_3_STRIDE 0xE06B44845 846#define mmTPC0_CFG_QM_TENSOR_5_DIM_4_SIZE 0xE06B48847 848#define mmTPC0_CFG_QM_TENSOR_5_DIM_4_STRIDE 0xE06B4C849 850#define mmTPC0_CFG_QM_TENSOR_6_BASE_ADDR_LOW 0xE06B50851 852#define mmTPC0_CFG_QM_TENSOR_6_BASE_ADDR_HIGH 0xE06B54853 854#define mmTPC0_CFG_QM_TENSOR_6_PADDING_VALUE 0xE06B58855 856#define mmTPC0_CFG_QM_TENSOR_6_TENSOR_CONFIG 0xE06B5C857 858#define mmTPC0_CFG_QM_TENSOR_6_DIM_0_SIZE 0xE06B60859 860#define mmTPC0_CFG_QM_TENSOR_6_DIM_0_STRIDE 0xE06B64861 862#define mmTPC0_CFG_QM_TENSOR_6_DIM_1_SIZE 0xE06B68863 864#define mmTPC0_CFG_QM_TENSOR_6_DIM_1_STRIDE 0xE06B6C865 866#define mmTPC0_CFG_QM_TENSOR_6_DIM_2_SIZE 0xE06B70867 868#define mmTPC0_CFG_QM_TENSOR_6_DIM_2_STRIDE 0xE06B74869 870#define mmTPC0_CFG_QM_TENSOR_6_DIM_3_SIZE 0xE06B78871 872#define mmTPC0_CFG_QM_TENSOR_6_DIM_3_STRIDE 0xE06B7C873 874#define mmTPC0_CFG_QM_TENSOR_6_DIM_4_SIZE 0xE06B80875 876#define mmTPC0_CFG_QM_TENSOR_6_DIM_4_STRIDE 0xE06B84877 878#define mmTPC0_CFG_QM_TENSOR_7_BASE_ADDR_LOW 0xE06B88879 880#define mmTPC0_CFG_QM_TENSOR_7_BASE_ADDR_HIGH 0xE06B8C881 882#define mmTPC0_CFG_QM_TENSOR_7_PADDING_VALUE 0xE06B90883 884#define mmTPC0_CFG_QM_TENSOR_7_TENSOR_CONFIG 0xE06B94885 886#define mmTPC0_CFG_QM_TENSOR_7_DIM_0_SIZE 0xE06B98887 888#define mmTPC0_CFG_QM_TENSOR_7_DIM_0_STRIDE 0xE06B9C889 890#define mmTPC0_CFG_QM_TENSOR_7_DIM_1_SIZE 0xE06BA0891 892#define mmTPC0_CFG_QM_TENSOR_7_DIM_1_STRIDE 0xE06BA4893 894#define mmTPC0_CFG_QM_TENSOR_7_DIM_2_SIZE 0xE06BA8895 896#define mmTPC0_CFG_QM_TENSOR_7_DIM_2_STRIDE 0xE06BAC897 898#define mmTPC0_CFG_QM_TENSOR_7_DIM_3_SIZE 0xE06BB0899 900#define mmTPC0_CFG_QM_TENSOR_7_DIM_3_STRIDE 0xE06BB4901 902#define mmTPC0_CFG_QM_TENSOR_7_DIM_4_SIZE 0xE06BB8903 904#define mmTPC0_CFG_QM_TENSOR_7_DIM_4_STRIDE 0xE06BBC905 906#define mmTPC0_CFG_QM_TENSOR_8_BASE_ADDR_LOW 0xE06BC0907 908#define mmTPC0_CFG_QM_TENSOR_8_BASE_ADDR_HIGH 0xE06BC4909 910#define mmTPC0_CFG_QM_TENSOR_8_PADDING_VALUE 0xE06BC8911 912#define mmTPC0_CFG_QM_TENSOR_8_TENSOR_CONFIG 0xE06BCC913 914#define mmTPC0_CFG_QM_TENSOR_8_DIM_0_SIZE 0xE06BD0915 916#define mmTPC0_CFG_QM_TENSOR_8_DIM_0_STRIDE 0xE06BD4917 918#define mmTPC0_CFG_QM_TENSOR_8_DIM_1_SIZE 0xE06BD8919 920#define mmTPC0_CFG_QM_TENSOR_8_DIM_1_STRIDE 0xE06BDC921 922#define mmTPC0_CFG_QM_TENSOR_8_DIM_2_SIZE 0xE06BE0923 924#define mmTPC0_CFG_QM_TENSOR_8_DIM_2_STRIDE 0xE06BE4925 926#define mmTPC0_CFG_QM_TENSOR_8_DIM_3_SIZE 0xE06BE8927 928#define mmTPC0_CFG_QM_TENSOR_8_DIM_3_STRIDE 0xE06BEC929 930#define mmTPC0_CFG_QM_TENSOR_8_DIM_4_SIZE 0xE06BF0931 932#define mmTPC0_CFG_QM_TENSOR_8_DIM_4_STRIDE 0xE06BF4933 934#define mmTPC0_CFG_QM_TENSOR_9_BASE_ADDR_LOW 0xE06BF8935 936#define mmTPC0_CFG_QM_TENSOR_9_BASE_ADDR_HIGH 0xE06BFC937 938#define mmTPC0_CFG_QM_TENSOR_9_PADDING_VALUE 0xE06C00939 940#define mmTPC0_CFG_QM_TENSOR_9_TENSOR_CONFIG 0xE06C04941 942#define mmTPC0_CFG_QM_TENSOR_9_DIM_0_SIZE 0xE06C08943 944#define mmTPC0_CFG_QM_TENSOR_9_DIM_0_STRIDE 0xE06C0C945 946#define mmTPC0_CFG_QM_TENSOR_9_DIM_1_SIZE 0xE06C10947 948#define mmTPC0_CFG_QM_TENSOR_9_DIM_1_STRIDE 0xE06C14949 950#define mmTPC0_CFG_QM_TENSOR_9_DIM_2_SIZE 0xE06C18951 952#define mmTPC0_CFG_QM_TENSOR_9_DIM_2_STRIDE 0xE06C1C953 954#define mmTPC0_CFG_QM_TENSOR_9_DIM_3_SIZE 0xE06C20955 956#define mmTPC0_CFG_QM_TENSOR_9_DIM_3_STRIDE 0xE06C24957 958#define mmTPC0_CFG_QM_TENSOR_9_DIM_4_SIZE 0xE06C28959 960#define mmTPC0_CFG_QM_TENSOR_9_DIM_4_STRIDE 0xE06C2C961 962#define mmTPC0_CFG_QM_TENSOR_10_BASE_ADDR_LOW 0xE06C30963 964#define mmTPC0_CFG_QM_TENSOR_10_BASE_ADDR_HIGH 0xE06C34965 966#define mmTPC0_CFG_QM_TENSOR_10_PADDING_VALUE 0xE06C38967 968#define mmTPC0_CFG_QM_TENSOR_10_TENSOR_CONFIG 0xE06C3C969 970#define mmTPC0_CFG_QM_TENSOR_10_DIM_0_SIZE 0xE06C40971 972#define mmTPC0_CFG_QM_TENSOR_10_DIM_0_STRIDE 0xE06C44973 974#define mmTPC0_CFG_QM_TENSOR_10_DIM_1_SIZE 0xE06C48975 976#define mmTPC0_CFG_QM_TENSOR_10_DIM_1_STRIDE 0xE06C4C977 978#define mmTPC0_CFG_QM_TENSOR_10_DIM_2_SIZE 0xE06C50979 980#define mmTPC0_CFG_QM_TENSOR_10_DIM_2_STRIDE 0xE06C54981 982#define mmTPC0_CFG_QM_TENSOR_10_DIM_3_SIZE 0xE06C58983 984#define mmTPC0_CFG_QM_TENSOR_10_DIM_3_STRIDE 0xE06C5C985 986#define mmTPC0_CFG_QM_TENSOR_10_DIM_4_SIZE 0xE06C60987 988#define mmTPC0_CFG_QM_TENSOR_10_DIM_4_STRIDE 0xE06C64989 990#define mmTPC0_CFG_QM_TENSOR_11_BASE_ADDR_LOW 0xE06C68991 992#define mmTPC0_CFG_QM_TENSOR_11_BASE_ADDR_HIGH 0xE06C6C993 994#define mmTPC0_CFG_QM_TENSOR_11_PADDING_VALUE 0xE06C70995 996#define mmTPC0_CFG_QM_TENSOR_11_TENSOR_CONFIG 0xE06C74997 998#define mmTPC0_CFG_QM_TENSOR_11_DIM_0_SIZE 0xE06C78999 1000#define mmTPC0_CFG_QM_TENSOR_11_DIM_0_STRIDE 0xE06C7C1001 1002#define mmTPC0_CFG_QM_TENSOR_11_DIM_1_SIZE 0xE06C801003 1004#define mmTPC0_CFG_QM_TENSOR_11_DIM_1_STRIDE 0xE06C841005 1006#define mmTPC0_CFG_QM_TENSOR_11_DIM_2_SIZE 0xE06C881007 1008#define mmTPC0_CFG_QM_TENSOR_11_DIM_2_STRIDE 0xE06C8C1009 1010#define mmTPC0_CFG_QM_TENSOR_11_DIM_3_SIZE 0xE06C901011 1012#define mmTPC0_CFG_QM_TENSOR_11_DIM_3_STRIDE 0xE06C941013 1014#define mmTPC0_CFG_QM_TENSOR_11_DIM_4_SIZE 0xE06C981015 1016#define mmTPC0_CFG_QM_TENSOR_11_DIM_4_STRIDE 0xE06C9C1017 1018#define mmTPC0_CFG_QM_TENSOR_12_BASE_ADDR_LOW 0xE06CA01019 1020#define mmTPC0_CFG_QM_TENSOR_12_BASE_ADDR_HIGH 0xE06CA41021 1022#define mmTPC0_CFG_QM_TENSOR_12_PADDING_VALUE 0xE06CA81023 1024#define mmTPC0_CFG_QM_TENSOR_12_TENSOR_CONFIG 0xE06CAC1025 1026#define mmTPC0_CFG_QM_TENSOR_12_DIM_0_SIZE 0xE06CB01027 1028#define mmTPC0_CFG_QM_TENSOR_12_DIM_0_STRIDE 0xE06CB41029 1030#define mmTPC0_CFG_QM_TENSOR_12_DIM_1_SIZE 0xE06CB81031 1032#define mmTPC0_CFG_QM_TENSOR_12_DIM_1_STRIDE 0xE06CBC1033 1034#define mmTPC0_CFG_QM_TENSOR_12_DIM_2_SIZE 0xE06CC01035 1036#define mmTPC0_CFG_QM_TENSOR_12_DIM_2_STRIDE 0xE06CC41037 1038#define mmTPC0_CFG_QM_TENSOR_12_DIM_3_SIZE 0xE06CC81039 1040#define mmTPC0_CFG_QM_TENSOR_12_DIM_3_STRIDE 0xE06CCC1041 1042#define mmTPC0_CFG_QM_TENSOR_12_DIM_4_SIZE 0xE06CD01043 1044#define mmTPC0_CFG_QM_TENSOR_12_DIM_4_STRIDE 0xE06CD41045 1046#define mmTPC0_CFG_QM_TENSOR_13_BASE_ADDR_LOW 0xE06CD81047 1048#define mmTPC0_CFG_QM_TENSOR_13_BASE_ADDR_HIGH 0xE06CDC1049 1050#define mmTPC0_CFG_QM_TENSOR_13_PADDING_VALUE 0xE06CE01051 1052#define mmTPC0_CFG_QM_TENSOR_13_TENSOR_CONFIG 0xE06CE41053 1054#define mmTPC0_CFG_QM_TENSOR_13_DIM_0_SIZE 0xE06CE81055 1056#define mmTPC0_CFG_QM_TENSOR_13_DIM_0_STRIDE 0xE06CEC1057 1058#define mmTPC0_CFG_QM_TENSOR_13_DIM_1_SIZE 0xE06CF01059 1060#define mmTPC0_CFG_QM_TENSOR_13_DIM_1_STRIDE 0xE06CF41061 1062#define mmTPC0_CFG_QM_TENSOR_13_DIM_2_SIZE 0xE06CF81063 1064#define mmTPC0_CFG_QM_TENSOR_13_DIM_2_STRIDE 0xE06CFC1065 1066#define mmTPC0_CFG_QM_TENSOR_13_DIM_3_SIZE 0xE06D001067 1068#define mmTPC0_CFG_QM_TENSOR_13_DIM_3_STRIDE 0xE06D041069 1070#define mmTPC0_CFG_QM_TENSOR_13_DIM_4_SIZE 0xE06D081071 1072#define mmTPC0_CFG_QM_TENSOR_13_DIM_4_STRIDE 0xE06D0C1073 1074#define mmTPC0_CFG_QM_TENSOR_14_BASE_ADDR_LOW 0xE06D101075 1076#define mmTPC0_CFG_QM_TENSOR_14_BASE_ADDR_HIGH 0xE06D141077 1078#define mmTPC0_CFG_QM_TENSOR_14_PADDING_VALUE 0xE06D181079 1080#define mmTPC0_CFG_QM_TENSOR_14_TENSOR_CONFIG 0xE06D1C1081 1082#define mmTPC0_CFG_QM_TENSOR_14_DIM_0_SIZE 0xE06D201083 1084#define mmTPC0_CFG_QM_TENSOR_14_DIM_0_STRIDE 0xE06D241085 1086#define mmTPC0_CFG_QM_TENSOR_14_DIM_1_SIZE 0xE06D281087 1088#define mmTPC0_CFG_QM_TENSOR_14_DIM_1_STRIDE 0xE06D2C1089 1090#define mmTPC0_CFG_QM_TENSOR_14_DIM_2_SIZE 0xE06D301091 1092#define mmTPC0_CFG_QM_TENSOR_14_DIM_2_STRIDE 0xE06D341093 1094#define mmTPC0_CFG_QM_TENSOR_14_DIM_3_SIZE 0xE06D381095 1096#define mmTPC0_CFG_QM_TENSOR_14_DIM_3_STRIDE 0xE06D3C1097 1098#define mmTPC0_CFG_QM_TENSOR_14_DIM_4_SIZE 0xE06D401099 1100#define mmTPC0_CFG_QM_TENSOR_14_DIM_4_STRIDE 0xE06D441101 1102#define mmTPC0_CFG_QM_TENSOR_15_BASE_ADDR_LOW 0xE06D481103 1104#define mmTPC0_CFG_QM_TENSOR_15_BASE_ADDR_HIGH 0xE06D4C1105 1106#define mmTPC0_CFG_QM_TENSOR_15_PADDING_VALUE 0xE06D501107 1108#define mmTPC0_CFG_QM_TENSOR_15_TENSOR_CONFIG 0xE06D541109 1110#define mmTPC0_CFG_QM_TENSOR_15_DIM_0_SIZE 0xE06D581111 1112#define mmTPC0_CFG_QM_TENSOR_15_DIM_0_STRIDE 0xE06D5C1113 1114#define mmTPC0_CFG_QM_TENSOR_15_DIM_1_SIZE 0xE06D601115 1116#define mmTPC0_CFG_QM_TENSOR_15_DIM_1_STRIDE 0xE06D641117 1118#define mmTPC0_CFG_QM_TENSOR_15_DIM_2_SIZE 0xE06D681119 1120#define mmTPC0_CFG_QM_TENSOR_15_DIM_2_STRIDE 0xE06D6C1121 1122#define mmTPC0_CFG_QM_TENSOR_15_DIM_3_SIZE 0xE06D701123 1124#define mmTPC0_CFG_QM_TENSOR_15_DIM_3_STRIDE 0xE06D741125 1126#define mmTPC0_CFG_QM_TENSOR_15_DIM_4_SIZE 0xE06D781127 1128#define mmTPC0_CFG_QM_TENSOR_15_DIM_4_STRIDE 0xE06D7C1129 1130#define mmTPC0_CFG_QM_SYNC_OBJECT_MESSAGE 0xE06D801131 1132#define mmTPC0_CFG_QM_SYNC_OBJECT_ADDR 0xE06D841133 1134#define mmTPC0_CFG_QM_KERNEL_BASE_ADDRESS_LOW 0xE06D881135 1136#define mmTPC0_CFG_QM_KERNEL_BASE_ADDRESS_HIGH 0xE06D8C1137 1138#define mmTPC0_CFG_QM_TID_BASE_DIM_0 0xE06D901139 1140#define mmTPC0_CFG_QM_TID_SIZE_DIM_0 0xE06D941141 1142#define mmTPC0_CFG_QM_TID_BASE_DIM_1 0xE06D981143 1144#define mmTPC0_CFG_QM_TID_SIZE_DIM_1 0xE06D9C1145 1146#define mmTPC0_CFG_QM_TID_BASE_DIM_2 0xE06DA01147 1148#define mmTPC0_CFG_QM_TID_SIZE_DIM_2 0xE06DA41149 1150#define mmTPC0_CFG_QM_TID_BASE_DIM_3 0xE06DA81151 1152#define mmTPC0_CFG_QM_TID_SIZE_DIM_3 0xE06DAC1153 1154#define mmTPC0_CFG_QM_TID_BASE_DIM_4 0xE06DB01155 1156#define mmTPC0_CFG_QM_TID_SIZE_DIM_4 0xE06DB41157 1158#define mmTPC0_CFG_QM_KERNEL_CONFIG 0xE06DB81159 1160#define mmTPC0_CFG_QM_KERNEL_ID 0xE06DBC1161 1162#define mmTPC0_CFG_QM_SRF_0 0xE06DC01163 1164#define mmTPC0_CFG_QM_SRF_1 0xE06DC41165 1166#define mmTPC0_CFG_QM_SRF_2 0xE06DC81167 1168#define mmTPC0_CFG_QM_SRF_3 0xE06DCC1169 1170#define mmTPC0_CFG_QM_SRF_4 0xE06DD01171 1172#define mmTPC0_CFG_QM_SRF_5 0xE06DD41173 1174#define mmTPC0_CFG_QM_SRF_6 0xE06DD81175 1176#define mmTPC0_CFG_QM_SRF_7 0xE06DDC1177 1178#define mmTPC0_CFG_QM_SRF_8 0xE06DE01179 1180#define mmTPC0_CFG_QM_SRF_9 0xE06DE41181 1182#define mmTPC0_CFG_QM_SRF_10 0xE06DE81183 1184#define mmTPC0_CFG_QM_SRF_11 0xE06DEC1185 1186#define mmTPC0_CFG_QM_SRF_12 0xE06DF01187 1188#define mmTPC0_CFG_QM_SRF_13 0xE06DF41189 1190#define mmTPC0_CFG_QM_SRF_14 0xE06DF81191 1192#define mmTPC0_CFG_QM_SRF_15 0xE06DFC1193 1194#define mmTPC0_CFG_QM_SRF_16 0xE06E001195 1196#define mmTPC0_CFG_QM_SRF_17 0xE06E041197 1198#define mmTPC0_CFG_QM_SRF_18 0xE06E081199 1200#define mmTPC0_CFG_QM_SRF_19 0xE06E0C1201 1202#define mmTPC0_CFG_QM_SRF_20 0xE06E101203 1204#define mmTPC0_CFG_QM_SRF_21 0xE06E141205 1206#define mmTPC0_CFG_QM_SRF_22 0xE06E181207 1208#define mmTPC0_CFG_QM_SRF_23 0xE06E1C1209 1210#define mmTPC0_CFG_QM_SRF_24 0xE06E201211 1212#define mmTPC0_CFG_QM_SRF_25 0xE06E241213 1214#define mmTPC0_CFG_QM_SRF_26 0xE06E281215 1216#define mmTPC0_CFG_QM_SRF_27 0xE06E2C1217 1218#define mmTPC0_CFG_QM_SRF_28 0xE06E301219 1220#define mmTPC0_CFG_QM_SRF_29 0xE06E341221 1222#define mmTPC0_CFG_QM_SRF_30 0xE06E381223 1224#define mmTPC0_CFG_QM_SRF_31 0xE06E3C1225 1226#endif /* ASIC_REG_TPC0_CFG_REGS_H_ */1227