835 lines · c
1/* SPDX-License-Identifier: GPL-2.02 *3 * Copyright 2016-2018 HabanaLabs, Ltd.4 * All Rights Reserved.5 *6 */7 8/************************************9 ** This is an auto-generated file **10 ** DO NOT EDIT BELOW **11 ************************************/12 13#ifndef ASIC_REG_TPC4_QM_REGS_H_14#define ASIC_REG_TPC4_QM_REGS_H_15 16/*17 *****************************************18 * TPC4_QM (Prototype: QMAN)19 *****************************************20 */21 22#define mmTPC4_QM_GLBL_CFG0 0xF0800023 24#define mmTPC4_QM_GLBL_CFG1 0xF0800425 26#define mmTPC4_QM_GLBL_PROT 0xF0800827 28#define mmTPC4_QM_GLBL_ERR_CFG 0xF0800C29 30#define mmTPC4_QM_GLBL_SECURE_PROPS_0 0xF0801031 32#define mmTPC4_QM_GLBL_SECURE_PROPS_1 0xF0801433 34#define mmTPC4_QM_GLBL_SECURE_PROPS_2 0xF0801835 36#define mmTPC4_QM_GLBL_SECURE_PROPS_3 0xF0801C37 38#define mmTPC4_QM_GLBL_SECURE_PROPS_4 0xF0802039 40#define mmTPC4_QM_GLBL_NON_SECURE_PROPS_0 0xF0802441 42#define mmTPC4_QM_GLBL_NON_SECURE_PROPS_1 0xF0802843 44#define mmTPC4_QM_GLBL_NON_SECURE_PROPS_2 0xF0802C45 46#define mmTPC4_QM_GLBL_NON_SECURE_PROPS_3 0xF0803047 48#define mmTPC4_QM_GLBL_NON_SECURE_PROPS_4 0xF0803449 50#define mmTPC4_QM_GLBL_STS0 0xF0803851 52#define mmTPC4_QM_GLBL_STS1_0 0xF0804053 54#define mmTPC4_QM_GLBL_STS1_1 0xF0804455 56#define mmTPC4_QM_GLBL_STS1_2 0xF0804857 58#define mmTPC4_QM_GLBL_STS1_3 0xF0804C59 60#define mmTPC4_QM_GLBL_STS1_4 0xF0805061 62#define mmTPC4_QM_GLBL_MSG_EN_0 0xF0805463 64#define mmTPC4_QM_GLBL_MSG_EN_1 0xF0805865 66#define mmTPC4_QM_GLBL_MSG_EN_2 0xF0805C67 68#define mmTPC4_QM_GLBL_MSG_EN_3 0xF0806069 70#define mmTPC4_QM_GLBL_MSG_EN_4 0xF0806871 72#define mmTPC4_QM_PQ_BASE_LO_0 0xF0807073 74#define mmTPC4_QM_PQ_BASE_LO_1 0xF0807475 76#define mmTPC4_QM_PQ_BASE_LO_2 0xF0807877 78#define mmTPC4_QM_PQ_BASE_LO_3 0xF0807C79 80#define mmTPC4_QM_PQ_BASE_HI_0 0xF0808081 82#define mmTPC4_QM_PQ_BASE_HI_1 0xF0808483 84#define mmTPC4_QM_PQ_BASE_HI_2 0xF0808885 86#define mmTPC4_QM_PQ_BASE_HI_3 0xF0808C87 88#define mmTPC4_QM_PQ_SIZE_0 0xF0809089 90#define mmTPC4_QM_PQ_SIZE_1 0xF0809491 92#define mmTPC4_QM_PQ_SIZE_2 0xF0809893 94#define mmTPC4_QM_PQ_SIZE_3 0xF0809C95 96#define mmTPC4_QM_PQ_PI_0 0xF080A097 98#define mmTPC4_QM_PQ_PI_1 0xF080A499 100#define mmTPC4_QM_PQ_PI_2 0xF080A8101 102#define mmTPC4_QM_PQ_PI_3 0xF080AC103 104#define mmTPC4_QM_PQ_CI_0 0xF080B0105 106#define mmTPC4_QM_PQ_CI_1 0xF080B4107 108#define mmTPC4_QM_PQ_CI_2 0xF080B8109 110#define mmTPC4_QM_PQ_CI_3 0xF080BC111 112#define mmTPC4_QM_PQ_CFG0_0 0xF080C0113 114#define mmTPC4_QM_PQ_CFG0_1 0xF080C4115 116#define mmTPC4_QM_PQ_CFG0_2 0xF080C8117 118#define mmTPC4_QM_PQ_CFG0_3 0xF080CC119 120#define mmTPC4_QM_PQ_CFG1_0 0xF080D0121 122#define mmTPC4_QM_PQ_CFG1_1 0xF080D4123 124#define mmTPC4_QM_PQ_CFG1_2 0xF080D8125 126#define mmTPC4_QM_PQ_CFG1_3 0xF080DC127 128#define mmTPC4_QM_PQ_ARUSER_31_11_0 0xF080E0129 130#define mmTPC4_QM_PQ_ARUSER_31_11_1 0xF080E4131 132#define mmTPC4_QM_PQ_ARUSER_31_11_2 0xF080E8133 134#define mmTPC4_QM_PQ_ARUSER_31_11_3 0xF080EC135 136#define mmTPC4_QM_PQ_STS0_0 0xF080F0137 138#define mmTPC4_QM_PQ_STS0_1 0xF080F4139 140#define mmTPC4_QM_PQ_STS0_2 0xF080F8141 142#define mmTPC4_QM_PQ_STS0_3 0xF080FC143 144#define mmTPC4_QM_PQ_STS1_0 0xF08100145 146#define mmTPC4_QM_PQ_STS1_1 0xF08104147 148#define mmTPC4_QM_PQ_STS1_2 0xF08108149 150#define mmTPC4_QM_PQ_STS1_3 0xF0810C151 152#define mmTPC4_QM_CQ_CFG0_0 0xF08110153 154#define mmTPC4_QM_CQ_CFG0_1 0xF08114155 156#define mmTPC4_QM_CQ_CFG0_2 0xF08118157 158#define mmTPC4_QM_CQ_CFG0_3 0xF0811C159 160#define mmTPC4_QM_CQ_CFG0_4 0xF08120161 162#define mmTPC4_QM_CQ_CFG1_0 0xF08124163 164#define mmTPC4_QM_CQ_CFG1_1 0xF08128165 166#define mmTPC4_QM_CQ_CFG1_2 0xF0812C167 168#define mmTPC4_QM_CQ_CFG1_3 0xF08130169 170#define mmTPC4_QM_CQ_CFG1_4 0xF08134171 172#define mmTPC4_QM_CQ_ARUSER_31_11_0 0xF08138173 174#define mmTPC4_QM_CQ_ARUSER_31_11_1 0xF0813C175 176#define mmTPC4_QM_CQ_ARUSER_31_11_2 0xF08140177 178#define mmTPC4_QM_CQ_ARUSER_31_11_3 0xF08144179 180#define mmTPC4_QM_CQ_ARUSER_31_11_4 0xF08148181 182#define mmTPC4_QM_CQ_STS0_0 0xF0814C183 184#define mmTPC4_QM_CQ_STS0_1 0xF08150185 186#define mmTPC4_QM_CQ_STS0_2 0xF08154187 188#define mmTPC4_QM_CQ_STS0_3 0xF08158189 190#define mmTPC4_QM_CQ_STS0_4 0xF0815C191 192#define mmTPC4_QM_CQ_STS1_0 0xF08160193 194#define mmTPC4_QM_CQ_STS1_1 0xF08164195 196#define mmTPC4_QM_CQ_STS1_2 0xF08168197 198#define mmTPC4_QM_CQ_STS1_3 0xF0816C199 200#define mmTPC4_QM_CQ_STS1_4 0xF08170201 202#define mmTPC4_QM_CQ_PTR_LO_0 0xF08174203 204#define mmTPC4_QM_CQ_PTR_HI_0 0xF08178205 206#define mmTPC4_QM_CQ_TSIZE_0 0xF0817C207 208#define mmTPC4_QM_CQ_CTL_0 0xF08180209 210#define mmTPC4_QM_CQ_PTR_LO_1 0xF08184211 212#define mmTPC4_QM_CQ_PTR_HI_1 0xF08188213 214#define mmTPC4_QM_CQ_TSIZE_1 0xF0818C215 216#define mmTPC4_QM_CQ_CTL_1 0xF08190217 218#define mmTPC4_QM_CQ_PTR_LO_2 0xF08194219 220#define mmTPC4_QM_CQ_PTR_HI_2 0xF08198221 222#define mmTPC4_QM_CQ_TSIZE_2 0xF0819C223 224#define mmTPC4_QM_CQ_CTL_2 0xF081A0225 226#define mmTPC4_QM_CQ_PTR_LO_3 0xF081A4227 228#define mmTPC4_QM_CQ_PTR_HI_3 0xF081A8229 230#define mmTPC4_QM_CQ_TSIZE_3 0xF081AC231 232#define mmTPC4_QM_CQ_CTL_3 0xF081B0233 234#define mmTPC4_QM_CQ_PTR_LO_4 0xF081B4235 236#define mmTPC4_QM_CQ_PTR_HI_4 0xF081B8237 238#define mmTPC4_QM_CQ_TSIZE_4 0xF081BC239 240#define mmTPC4_QM_CQ_CTL_4 0xF081C0241 242#define mmTPC4_QM_CQ_PTR_LO_STS_0 0xF081C4243 244#define mmTPC4_QM_CQ_PTR_LO_STS_1 0xF081C8245 246#define mmTPC4_QM_CQ_PTR_LO_STS_2 0xF081CC247 248#define mmTPC4_QM_CQ_PTR_LO_STS_3 0xF081D0249 250#define mmTPC4_QM_CQ_PTR_LO_STS_4 0xF081D4251 252#define mmTPC4_QM_CQ_PTR_HI_STS_0 0xF081D8253 254#define mmTPC4_QM_CQ_PTR_HI_STS_1 0xF081DC255 256#define mmTPC4_QM_CQ_PTR_HI_STS_2 0xF081E0257 258#define mmTPC4_QM_CQ_PTR_HI_STS_3 0xF081E4259 260#define mmTPC4_QM_CQ_PTR_HI_STS_4 0xF081E8261 262#define mmTPC4_QM_CQ_TSIZE_STS_0 0xF081EC263 264#define mmTPC4_QM_CQ_TSIZE_STS_1 0xF081F0265 266#define mmTPC4_QM_CQ_TSIZE_STS_2 0xF081F4267 268#define mmTPC4_QM_CQ_TSIZE_STS_3 0xF081F8269 270#define mmTPC4_QM_CQ_TSIZE_STS_4 0xF081FC271 272#define mmTPC4_QM_CQ_CTL_STS_0 0xF08200273 274#define mmTPC4_QM_CQ_CTL_STS_1 0xF08204275 276#define mmTPC4_QM_CQ_CTL_STS_2 0xF08208277 278#define mmTPC4_QM_CQ_CTL_STS_3 0xF0820C279 280#define mmTPC4_QM_CQ_CTL_STS_4 0xF08210281 282#define mmTPC4_QM_CQ_IFIFO_CNT_0 0xF08214283 284#define mmTPC4_QM_CQ_IFIFO_CNT_1 0xF08218285 286#define mmTPC4_QM_CQ_IFIFO_CNT_2 0xF0821C287 288#define mmTPC4_QM_CQ_IFIFO_CNT_3 0xF08220289 290#define mmTPC4_QM_CQ_IFIFO_CNT_4 0xF08224291 292#define mmTPC4_QM_CP_MSG_BASE0_ADDR_LO_0 0xF08228293 294#define mmTPC4_QM_CP_MSG_BASE0_ADDR_LO_1 0xF0822C295 296#define mmTPC4_QM_CP_MSG_BASE0_ADDR_LO_2 0xF08230297 298#define mmTPC4_QM_CP_MSG_BASE0_ADDR_LO_3 0xF08234299 300#define mmTPC4_QM_CP_MSG_BASE0_ADDR_LO_4 0xF08238301 302#define mmTPC4_QM_CP_MSG_BASE0_ADDR_HI_0 0xF0823C303 304#define mmTPC4_QM_CP_MSG_BASE0_ADDR_HI_1 0xF08240305 306#define mmTPC4_QM_CP_MSG_BASE0_ADDR_HI_2 0xF08244307 308#define mmTPC4_QM_CP_MSG_BASE0_ADDR_HI_3 0xF08248309 310#define mmTPC4_QM_CP_MSG_BASE0_ADDR_HI_4 0xF0824C311 312#define mmTPC4_QM_CP_MSG_BASE1_ADDR_LO_0 0xF08250313 314#define mmTPC4_QM_CP_MSG_BASE1_ADDR_LO_1 0xF08254315 316#define mmTPC4_QM_CP_MSG_BASE1_ADDR_LO_2 0xF08258317 318#define mmTPC4_QM_CP_MSG_BASE1_ADDR_LO_3 0xF0825C319 320#define mmTPC4_QM_CP_MSG_BASE1_ADDR_LO_4 0xF08260321 322#define mmTPC4_QM_CP_MSG_BASE1_ADDR_HI_0 0xF08264323 324#define mmTPC4_QM_CP_MSG_BASE1_ADDR_HI_1 0xF08268325 326#define mmTPC4_QM_CP_MSG_BASE1_ADDR_HI_2 0xF0826C327 328#define mmTPC4_QM_CP_MSG_BASE1_ADDR_HI_3 0xF08270329 330#define mmTPC4_QM_CP_MSG_BASE1_ADDR_HI_4 0xF08274331 332#define mmTPC4_QM_CP_MSG_BASE2_ADDR_LO_0 0xF08278333 334#define mmTPC4_QM_CP_MSG_BASE2_ADDR_LO_1 0xF0827C335 336#define mmTPC4_QM_CP_MSG_BASE2_ADDR_LO_2 0xF08280337 338#define mmTPC4_QM_CP_MSG_BASE2_ADDR_LO_3 0xF08284339 340#define mmTPC4_QM_CP_MSG_BASE2_ADDR_LO_4 0xF08288341 342#define mmTPC4_QM_CP_MSG_BASE2_ADDR_HI_0 0xF0828C343 344#define mmTPC4_QM_CP_MSG_BASE2_ADDR_HI_1 0xF08290345 346#define mmTPC4_QM_CP_MSG_BASE2_ADDR_HI_2 0xF08294347 348#define mmTPC4_QM_CP_MSG_BASE2_ADDR_HI_3 0xF08298349 350#define mmTPC4_QM_CP_MSG_BASE2_ADDR_HI_4 0xF0829C351 352#define mmTPC4_QM_CP_MSG_BASE3_ADDR_LO_0 0xF082A0353 354#define mmTPC4_QM_CP_MSG_BASE3_ADDR_LO_1 0xF082A4355 356#define mmTPC4_QM_CP_MSG_BASE3_ADDR_LO_2 0xF082A8357 358#define mmTPC4_QM_CP_MSG_BASE3_ADDR_LO_3 0xF082AC359 360#define mmTPC4_QM_CP_MSG_BASE3_ADDR_LO_4 0xF082B0361 362#define mmTPC4_QM_CP_MSG_BASE3_ADDR_HI_0 0xF082B4363 364#define mmTPC4_QM_CP_MSG_BASE3_ADDR_HI_1 0xF082B8365 366#define mmTPC4_QM_CP_MSG_BASE3_ADDR_HI_2 0xF082BC367 368#define mmTPC4_QM_CP_MSG_BASE3_ADDR_HI_3 0xF082C0369 370#define mmTPC4_QM_CP_MSG_BASE3_ADDR_HI_4 0xF082C4371 372#define mmTPC4_QM_CP_LDMA_TSIZE_OFFSET_0 0xF082C8373 374#define mmTPC4_QM_CP_LDMA_TSIZE_OFFSET_1 0xF082CC375 376#define mmTPC4_QM_CP_LDMA_TSIZE_OFFSET_2 0xF082D0377 378#define mmTPC4_QM_CP_LDMA_TSIZE_OFFSET_3 0xF082D4379 380#define mmTPC4_QM_CP_LDMA_TSIZE_OFFSET_4 0xF082D8381 382#define mmTPC4_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 0xF082E0383 384#define mmTPC4_QM_CP_LDMA_SRC_BASE_LO_OFFSET_1 0xF082E4385 386#define mmTPC4_QM_CP_LDMA_SRC_BASE_LO_OFFSET_2 0xF082E8387 388#define mmTPC4_QM_CP_LDMA_SRC_BASE_LO_OFFSET_3 0xF082EC389 390#define mmTPC4_QM_CP_LDMA_SRC_BASE_LO_OFFSET_4 0xF082F0391 392#define mmTPC4_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 0xF082F4393 394#define mmTPC4_QM_CP_LDMA_DST_BASE_LO_OFFSET_1 0xF082F8395 396#define mmTPC4_QM_CP_LDMA_DST_BASE_LO_OFFSET_2 0xF082FC397 398#define mmTPC4_QM_CP_LDMA_DST_BASE_LO_OFFSET_3 0xF08300399 400#define mmTPC4_QM_CP_LDMA_DST_BASE_LO_OFFSET_4 0xF08304401 402#define mmTPC4_QM_CP_FENCE0_RDATA_0 0xF08308403 404#define mmTPC4_QM_CP_FENCE0_RDATA_1 0xF0830C405 406#define mmTPC4_QM_CP_FENCE0_RDATA_2 0xF08310407 408#define mmTPC4_QM_CP_FENCE0_RDATA_3 0xF08314409 410#define mmTPC4_QM_CP_FENCE0_RDATA_4 0xF08318411 412#define mmTPC4_QM_CP_FENCE1_RDATA_0 0xF0831C413 414#define mmTPC4_QM_CP_FENCE1_RDATA_1 0xF08320415 416#define mmTPC4_QM_CP_FENCE1_RDATA_2 0xF08324417 418#define mmTPC4_QM_CP_FENCE1_RDATA_3 0xF08328419 420#define mmTPC4_QM_CP_FENCE1_RDATA_4 0xF0832C421 422#define mmTPC4_QM_CP_FENCE2_RDATA_0 0xF08330423 424#define mmTPC4_QM_CP_FENCE2_RDATA_1 0xF08334425 426#define mmTPC4_QM_CP_FENCE2_RDATA_2 0xF08338427 428#define mmTPC4_QM_CP_FENCE2_RDATA_3 0xF0833C429 430#define mmTPC4_QM_CP_FENCE2_RDATA_4 0xF08340431 432#define mmTPC4_QM_CP_FENCE3_RDATA_0 0xF08344433 434#define mmTPC4_QM_CP_FENCE3_RDATA_1 0xF08348435 436#define mmTPC4_QM_CP_FENCE3_RDATA_2 0xF0834C437 438#define mmTPC4_QM_CP_FENCE3_RDATA_3 0xF08350439 440#define mmTPC4_QM_CP_FENCE3_RDATA_4 0xF08354441 442#define mmTPC4_QM_CP_FENCE0_CNT_0 0xF08358443 444#define mmTPC4_QM_CP_FENCE0_CNT_1 0xF0835C445 446#define mmTPC4_QM_CP_FENCE0_CNT_2 0xF08360447 448#define mmTPC4_QM_CP_FENCE0_CNT_3 0xF08364449 450#define mmTPC4_QM_CP_FENCE0_CNT_4 0xF08368451 452#define mmTPC4_QM_CP_FENCE1_CNT_0 0xF0836C453 454#define mmTPC4_QM_CP_FENCE1_CNT_1 0xF08370455 456#define mmTPC4_QM_CP_FENCE1_CNT_2 0xF08374457 458#define mmTPC4_QM_CP_FENCE1_CNT_3 0xF08378459 460#define mmTPC4_QM_CP_FENCE1_CNT_4 0xF0837C461 462#define mmTPC4_QM_CP_FENCE2_CNT_0 0xF08380463 464#define mmTPC4_QM_CP_FENCE2_CNT_1 0xF08384465 466#define mmTPC4_QM_CP_FENCE2_CNT_2 0xF08388467 468#define mmTPC4_QM_CP_FENCE2_CNT_3 0xF0838C469 470#define mmTPC4_QM_CP_FENCE2_CNT_4 0xF08390471 472#define mmTPC4_QM_CP_FENCE3_CNT_0 0xF08394473 474#define mmTPC4_QM_CP_FENCE3_CNT_1 0xF08398475 476#define mmTPC4_QM_CP_FENCE3_CNT_2 0xF0839C477 478#define mmTPC4_QM_CP_FENCE3_CNT_3 0xF083A0479 480#define mmTPC4_QM_CP_FENCE3_CNT_4 0xF083A4481 482#define mmTPC4_QM_CP_STS_0 0xF083A8483 484#define mmTPC4_QM_CP_STS_1 0xF083AC485 486#define mmTPC4_QM_CP_STS_2 0xF083B0487 488#define mmTPC4_QM_CP_STS_3 0xF083B4489 490#define mmTPC4_QM_CP_STS_4 0xF083B8491 492#define mmTPC4_QM_CP_CURRENT_INST_LO_0 0xF083BC493 494#define mmTPC4_QM_CP_CURRENT_INST_LO_1 0xF083C0495 496#define mmTPC4_QM_CP_CURRENT_INST_LO_2 0xF083C4497 498#define mmTPC4_QM_CP_CURRENT_INST_LO_3 0xF083C8499 500#define mmTPC4_QM_CP_CURRENT_INST_LO_4 0xF083CC501 502#define mmTPC4_QM_CP_CURRENT_INST_HI_0 0xF083D0503 504#define mmTPC4_QM_CP_CURRENT_INST_HI_1 0xF083D4505 506#define mmTPC4_QM_CP_CURRENT_INST_HI_2 0xF083D8507 508#define mmTPC4_QM_CP_CURRENT_INST_HI_3 0xF083DC509 510#define mmTPC4_QM_CP_CURRENT_INST_HI_4 0xF083E0511 512#define mmTPC4_QM_CP_BARRIER_CFG_0 0xF083F4513 514#define mmTPC4_QM_CP_BARRIER_CFG_1 0xF083F8515 516#define mmTPC4_QM_CP_BARRIER_CFG_2 0xF083FC517 518#define mmTPC4_QM_CP_BARRIER_CFG_3 0xF08400519 520#define mmTPC4_QM_CP_BARRIER_CFG_4 0xF08404521 522#define mmTPC4_QM_CP_DBG_0_0 0xF08408523 524#define mmTPC4_QM_CP_DBG_0_1 0xF0840C525 526#define mmTPC4_QM_CP_DBG_0_2 0xF08410527 528#define mmTPC4_QM_CP_DBG_0_3 0xF08414529 530#define mmTPC4_QM_CP_DBG_0_4 0xF08418531 532#define mmTPC4_QM_CP_ARUSER_31_11_0 0xF0841C533 534#define mmTPC4_QM_CP_ARUSER_31_11_1 0xF08420535 536#define mmTPC4_QM_CP_ARUSER_31_11_2 0xF08424537 538#define mmTPC4_QM_CP_ARUSER_31_11_3 0xF08428539 540#define mmTPC4_QM_CP_ARUSER_31_11_4 0xF0842C541 542#define mmTPC4_QM_CP_AWUSER_31_11_0 0xF08430543 544#define mmTPC4_QM_CP_AWUSER_31_11_1 0xF08434545 546#define mmTPC4_QM_CP_AWUSER_31_11_2 0xF08438547 548#define mmTPC4_QM_CP_AWUSER_31_11_3 0xF0843C549 550#define mmTPC4_QM_CP_AWUSER_31_11_4 0xF08440551 552#define mmTPC4_QM_ARB_CFG_0 0xF08A00553 554#define mmTPC4_QM_ARB_CHOISE_Q_PUSH 0xF08A04555 556#define mmTPC4_QM_ARB_WRR_WEIGHT_0 0xF08A08557 558#define mmTPC4_QM_ARB_WRR_WEIGHT_1 0xF08A0C559 560#define mmTPC4_QM_ARB_WRR_WEIGHT_2 0xF08A10561 562#define mmTPC4_QM_ARB_WRR_WEIGHT_3 0xF08A14563 564#define mmTPC4_QM_ARB_CFG_1 0xF08A18565 566#define mmTPC4_QM_ARB_MST_AVAIL_CRED_0 0xF08A20567 568#define mmTPC4_QM_ARB_MST_AVAIL_CRED_1 0xF08A24569 570#define mmTPC4_QM_ARB_MST_AVAIL_CRED_2 0xF08A28571 572#define mmTPC4_QM_ARB_MST_AVAIL_CRED_3 0xF08A2C573 574#define mmTPC4_QM_ARB_MST_AVAIL_CRED_4 0xF08A30575 576#define mmTPC4_QM_ARB_MST_AVAIL_CRED_5 0xF08A34577 578#define mmTPC4_QM_ARB_MST_AVAIL_CRED_6 0xF08A38579 580#define mmTPC4_QM_ARB_MST_AVAIL_CRED_7 0xF08A3C581 582#define mmTPC4_QM_ARB_MST_AVAIL_CRED_8 0xF08A40583 584#define mmTPC4_QM_ARB_MST_AVAIL_CRED_9 0xF08A44585 586#define mmTPC4_QM_ARB_MST_AVAIL_CRED_10 0xF08A48587 588#define mmTPC4_QM_ARB_MST_AVAIL_CRED_11 0xF08A4C589 590#define mmTPC4_QM_ARB_MST_AVAIL_CRED_12 0xF08A50591 592#define mmTPC4_QM_ARB_MST_AVAIL_CRED_13 0xF08A54593 594#define mmTPC4_QM_ARB_MST_AVAIL_CRED_14 0xF08A58595 596#define mmTPC4_QM_ARB_MST_AVAIL_CRED_15 0xF08A5C597 598#define mmTPC4_QM_ARB_MST_AVAIL_CRED_16 0xF08A60599 600#define mmTPC4_QM_ARB_MST_AVAIL_CRED_17 0xF08A64601 602#define mmTPC4_QM_ARB_MST_AVAIL_CRED_18 0xF08A68603 604#define mmTPC4_QM_ARB_MST_AVAIL_CRED_19 0xF08A6C605 606#define mmTPC4_QM_ARB_MST_AVAIL_CRED_20 0xF08A70607 608#define mmTPC4_QM_ARB_MST_AVAIL_CRED_21 0xF08A74609 610#define mmTPC4_QM_ARB_MST_AVAIL_CRED_22 0xF08A78611 612#define mmTPC4_QM_ARB_MST_AVAIL_CRED_23 0xF08A7C613 614#define mmTPC4_QM_ARB_MST_AVAIL_CRED_24 0xF08A80615 616#define mmTPC4_QM_ARB_MST_AVAIL_CRED_25 0xF08A84617 618#define mmTPC4_QM_ARB_MST_AVAIL_CRED_26 0xF08A88619 620#define mmTPC4_QM_ARB_MST_AVAIL_CRED_27 0xF08A8C621 622#define mmTPC4_QM_ARB_MST_AVAIL_CRED_28 0xF08A90623 624#define mmTPC4_QM_ARB_MST_AVAIL_CRED_29 0xF08A94625 626#define mmTPC4_QM_ARB_MST_AVAIL_CRED_30 0xF08A98627 628#define mmTPC4_QM_ARB_MST_AVAIL_CRED_31 0xF08A9C629 630#define mmTPC4_QM_ARB_MST_CRED_INC 0xF08AA0631 632#define mmTPC4_QM_ARB_MST_CHOISE_PUSH_OFST_0 0xF08AA4633 634#define mmTPC4_QM_ARB_MST_CHOISE_PUSH_OFST_1 0xF08AA8635 636#define mmTPC4_QM_ARB_MST_CHOISE_PUSH_OFST_2 0xF08AAC637 638#define mmTPC4_QM_ARB_MST_CHOISE_PUSH_OFST_3 0xF08AB0639 640#define mmTPC4_QM_ARB_MST_CHOISE_PUSH_OFST_4 0xF08AB4641 642#define mmTPC4_QM_ARB_MST_CHOISE_PUSH_OFST_5 0xF08AB8643 644#define mmTPC4_QM_ARB_MST_CHOISE_PUSH_OFST_6 0xF08ABC645 646#define mmTPC4_QM_ARB_MST_CHOISE_PUSH_OFST_7 0xF08AC0647 648#define mmTPC4_QM_ARB_MST_CHOISE_PUSH_OFST_8 0xF08AC4649 650#define mmTPC4_QM_ARB_MST_CHOISE_PUSH_OFST_9 0xF08AC8651 652#define mmTPC4_QM_ARB_MST_CHOISE_PUSH_OFST_10 0xF08ACC653 654#define mmTPC4_QM_ARB_MST_CHOISE_PUSH_OFST_11 0xF08AD0655 656#define mmTPC4_QM_ARB_MST_CHOISE_PUSH_OFST_12 0xF08AD4657 658#define mmTPC4_QM_ARB_MST_CHOISE_PUSH_OFST_13 0xF08AD8659 660#define mmTPC4_QM_ARB_MST_CHOISE_PUSH_OFST_14 0xF08ADC661 662#define mmTPC4_QM_ARB_MST_CHOISE_PUSH_OFST_15 0xF08AE0663 664#define mmTPC4_QM_ARB_MST_CHOISE_PUSH_OFST_16 0xF08AE4665 666#define mmTPC4_QM_ARB_MST_CHOISE_PUSH_OFST_17 0xF08AE8667 668#define mmTPC4_QM_ARB_MST_CHOISE_PUSH_OFST_18 0xF08AEC669 670#define mmTPC4_QM_ARB_MST_CHOISE_PUSH_OFST_19 0xF08AF0671 672#define mmTPC4_QM_ARB_MST_CHOISE_PUSH_OFST_20 0xF08AF4673 674#define mmTPC4_QM_ARB_MST_CHOISE_PUSH_OFST_21 0xF08AF8675 676#define mmTPC4_QM_ARB_MST_CHOISE_PUSH_OFST_22 0xF08AFC677 678#define mmTPC4_QM_ARB_MST_CHOISE_PUSH_OFST_23 0xF08B00679 680#define mmTPC4_QM_ARB_MST_CHOISE_PUSH_OFST_24 0xF08B04681 682#define mmTPC4_QM_ARB_MST_CHOISE_PUSH_OFST_25 0xF08B08683 684#define mmTPC4_QM_ARB_MST_CHOISE_PUSH_OFST_26 0xF08B0C685 686#define mmTPC4_QM_ARB_MST_CHOISE_PUSH_OFST_27 0xF08B10687 688#define mmTPC4_QM_ARB_MST_CHOISE_PUSH_OFST_28 0xF08B14689 690#define mmTPC4_QM_ARB_MST_CHOISE_PUSH_OFST_29 0xF08B18691 692#define mmTPC4_QM_ARB_MST_CHOISE_PUSH_OFST_30 0xF08B1C693 694#define mmTPC4_QM_ARB_MST_CHOISE_PUSH_OFST_31 0xF08B20695 696#define mmTPC4_QM_ARB_SLV_MASTER_INC_CRED_OFST 0xF08B28697 698#define mmTPC4_QM_ARB_MST_SLAVE_EN 0xF08B2C699 700#define mmTPC4_QM_ARB_MST_QUIET_PER 0xF08B34701 702#define mmTPC4_QM_ARB_SLV_CHOISE_WDT 0xF08B38703 704#define mmTPC4_QM_ARB_SLV_ID 0xF08B3C705 706#define mmTPC4_QM_ARB_MSG_MAX_INFLIGHT 0xF08B44707 708#define mmTPC4_QM_ARB_MSG_AWUSER_31_11 0xF08B48709 710#define mmTPC4_QM_ARB_MSG_AWUSER_SEC_PROP 0xF08B4C711 712#define mmTPC4_QM_ARB_MSG_AWUSER_NON_SEC_PROP 0xF08B50713 714#define mmTPC4_QM_ARB_BASE_LO 0xF08B54715 716#define mmTPC4_QM_ARB_BASE_HI 0xF08B58717 718#define mmTPC4_QM_ARB_STATE_STS 0xF08B80719 720#define mmTPC4_QM_ARB_CHOISE_FULLNESS_STS 0xF08B84721 722#define mmTPC4_QM_ARB_MSG_STS 0xF08B88723 724#define mmTPC4_QM_ARB_SLV_CHOISE_Q_HEAD 0xF08B8C725 726#define mmTPC4_QM_ARB_ERR_CAUSE 0xF08B9C727 728#define mmTPC4_QM_ARB_ERR_MSG_EN 0xF08BA0729 730#define mmTPC4_QM_ARB_ERR_STS_DRP 0xF08BA8731 732#define mmTPC4_QM_ARB_MST_CRED_STS_0 0xF08BB0733 734#define mmTPC4_QM_ARB_MST_CRED_STS_1 0xF08BB4735 736#define mmTPC4_QM_ARB_MST_CRED_STS_2 0xF08BB8737 738#define mmTPC4_QM_ARB_MST_CRED_STS_3 0xF08BBC739 740#define mmTPC4_QM_ARB_MST_CRED_STS_4 0xF08BC0741 742#define mmTPC4_QM_ARB_MST_CRED_STS_5 0xF08BC4743 744#define mmTPC4_QM_ARB_MST_CRED_STS_6 0xF08BC8745 746#define mmTPC4_QM_ARB_MST_CRED_STS_7 0xF08BCC747 748#define mmTPC4_QM_ARB_MST_CRED_STS_8 0xF08BD0749 750#define mmTPC4_QM_ARB_MST_CRED_STS_9 0xF08BD4751 752#define mmTPC4_QM_ARB_MST_CRED_STS_10 0xF08BD8753 754#define mmTPC4_QM_ARB_MST_CRED_STS_11 0xF08BDC755 756#define mmTPC4_QM_ARB_MST_CRED_STS_12 0xF08BE0757 758#define mmTPC4_QM_ARB_MST_CRED_STS_13 0xF08BE4759 760#define mmTPC4_QM_ARB_MST_CRED_STS_14 0xF08BE8761 762#define mmTPC4_QM_ARB_MST_CRED_STS_15 0xF08BEC763 764#define mmTPC4_QM_ARB_MST_CRED_STS_16 0xF08BF0765 766#define mmTPC4_QM_ARB_MST_CRED_STS_17 0xF08BF4767 768#define mmTPC4_QM_ARB_MST_CRED_STS_18 0xF08BF8769 770#define mmTPC4_QM_ARB_MST_CRED_STS_19 0xF08BFC771 772#define mmTPC4_QM_ARB_MST_CRED_STS_20 0xF08C00773 774#define mmTPC4_QM_ARB_MST_CRED_STS_21 0xF08C04775 776#define mmTPC4_QM_ARB_MST_CRED_STS_22 0xF08C08777 778#define mmTPC4_QM_ARB_MST_CRED_STS_23 0xF08C0C779 780#define mmTPC4_QM_ARB_MST_CRED_STS_24 0xF08C10781 782#define mmTPC4_QM_ARB_MST_CRED_STS_25 0xF08C14783 784#define mmTPC4_QM_ARB_MST_CRED_STS_26 0xF08C18785 786#define mmTPC4_QM_ARB_MST_CRED_STS_27 0xF08C1C787 788#define mmTPC4_QM_ARB_MST_CRED_STS_28 0xF08C20789 790#define mmTPC4_QM_ARB_MST_CRED_STS_29 0xF08C24791 792#define mmTPC4_QM_ARB_MST_CRED_STS_30 0xF08C28793 794#define mmTPC4_QM_ARB_MST_CRED_STS_31 0xF08C2C795 796#define mmTPC4_QM_CGM_CFG 0xF08C70797 798#define mmTPC4_QM_CGM_STS 0xF08C74799 800#define mmTPC4_QM_CGM_CFG1 0xF08C78801 802#define mmTPC4_QM_LOCAL_RANGE_BASE 0xF08C80803 804#define mmTPC4_QM_LOCAL_RANGE_SIZE 0xF08C84805 806#define mmTPC4_QM_CSMR_STRICT_PRIO_CFG 0xF08C90807 808#define mmTPC4_QM_HBW_RD_RATE_LIM_CFG_1 0xF08C94809 810#define mmTPC4_QM_LBW_WR_RATE_LIM_CFG_0 0xF08C98811 812#define mmTPC4_QM_LBW_WR_RATE_LIM_CFG_1 0xF08C9C813 814#define mmTPC4_QM_HBW_RD_RATE_LIM_CFG_0 0xF08CA0815 816#define mmTPC4_QM_GLBL_AXCACHE 0xF08CA4817 818#define mmTPC4_QM_IND_GW_APB_CFG 0xF08CB0819 820#define mmTPC4_QM_IND_GW_APB_WDATA 0xF08CB4821 822#define mmTPC4_QM_IND_GW_APB_RDATA 0xF08CB8823 824#define mmTPC4_QM_IND_GW_APB_STATUS 0xF08CBC825 826#define mmTPC4_QM_GLBL_ERR_ADDR_LO 0xF08CD0827 828#define mmTPC4_QM_GLBL_ERR_ADDR_HI 0xF08CD4829 830#define mmTPC4_QM_GLBL_ERR_WDATA 0xF08CD8831 832#define mmTPC4_QM_GLBL_MEM_INIT_BUSY 0xF08D00833 834#endif /* ASIC_REG_TPC4_QM_REGS_H_ */835