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1/* SPDX-License-Identifier: GPL-2.02 *3 * Copyright 2016-2018 HabanaLabs, Ltd.4 * All Rights Reserved.5 *6 */7 8/************************************9 ** This is an auto-generated file **10 ** DO NOT EDIT BELOW **11 ************************************/12 13#ifndef ASIC_REG_DMA_MACRO_REGS_H_14#define ASIC_REG_DMA_MACRO_REGS_H_15 16/*17 *****************************************18 * DMA_MACRO (Prototype: DMA_MACRO)19 *****************************************20 */21 22#define mmDMA_MACRO_LBW_RANGE_HIT_BLOCK 0x4B000023 24#define mmDMA_MACRO_LBW_RANGE_MASK_0 0x4B000425 26#define mmDMA_MACRO_LBW_RANGE_MASK_1 0x4B000827 28#define mmDMA_MACRO_LBW_RANGE_MASK_2 0x4B000C29 30#define mmDMA_MACRO_LBW_RANGE_MASK_3 0x4B001031 32#define mmDMA_MACRO_LBW_RANGE_MASK_4 0x4B001433 34#define mmDMA_MACRO_LBW_RANGE_MASK_5 0x4B001835 36#define mmDMA_MACRO_LBW_RANGE_MASK_6 0x4B001C37 38#define mmDMA_MACRO_LBW_RANGE_MASK_7 0x4B002039 40#define mmDMA_MACRO_LBW_RANGE_MASK_8 0x4B002441 42#define mmDMA_MACRO_LBW_RANGE_MASK_9 0x4B002843 44#define mmDMA_MACRO_LBW_RANGE_MASK_10 0x4B002C45 46#define mmDMA_MACRO_LBW_RANGE_MASK_11 0x4B003047 48#define mmDMA_MACRO_LBW_RANGE_MASK_12 0x4B003449 50#define mmDMA_MACRO_LBW_RANGE_MASK_13 0x4B003851 52#define mmDMA_MACRO_LBW_RANGE_MASK_14 0x4B003C53 54#define mmDMA_MACRO_LBW_RANGE_MASK_15 0x4B004055 56#define mmDMA_MACRO_LBW_RANGE_BASE_0 0x4B004457 58#define mmDMA_MACRO_LBW_RANGE_BASE_1 0x4B004859 60#define mmDMA_MACRO_LBW_RANGE_BASE_2 0x4B004C61 62#define mmDMA_MACRO_LBW_RANGE_BASE_3 0x4B005063 64#define mmDMA_MACRO_LBW_RANGE_BASE_4 0x4B005465 66#define mmDMA_MACRO_LBW_RANGE_BASE_5 0x4B005867 68#define mmDMA_MACRO_LBW_RANGE_BASE_6 0x4B005C69 70#define mmDMA_MACRO_LBW_RANGE_BASE_7 0x4B006071 72#define mmDMA_MACRO_LBW_RANGE_BASE_8 0x4B006473 74#define mmDMA_MACRO_LBW_RANGE_BASE_9 0x4B006875 76#define mmDMA_MACRO_LBW_RANGE_BASE_10 0x4B006C77 78#define mmDMA_MACRO_LBW_RANGE_BASE_11 0x4B007079 80#define mmDMA_MACRO_LBW_RANGE_BASE_12 0x4B007481 82#define mmDMA_MACRO_LBW_RANGE_BASE_13 0x4B007883 84#define mmDMA_MACRO_LBW_RANGE_BASE_14 0x4B007C85 86#define mmDMA_MACRO_LBW_RANGE_BASE_15 0x4B008087 88#define mmDMA_MACRO_HBW_RANGE_HIT_BLOCK 0x4B008489 90#define mmDMA_MACRO_HBW_RANGE_MASK_49_32_0 0x4B00A891 92#define mmDMA_MACRO_HBW_RANGE_MASK_49_32_1 0x4B00AC93 94#define mmDMA_MACRO_HBW_RANGE_MASK_49_32_2 0x4B00B095 96#define mmDMA_MACRO_HBW_RANGE_MASK_49_32_3 0x4B00B497 98#define mmDMA_MACRO_HBW_RANGE_MASK_49_32_4 0x4B00B899 100#define mmDMA_MACRO_HBW_RANGE_MASK_49_32_5 0x4B00BC101 102#define mmDMA_MACRO_HBW_RANGE_MASK_49_32_6 0x4B00C0103 104#define mmDMA_MACRO_HBW_RANGE_MASK_49_32_7 0x4B00C4105 106#define mmDMA_MACRO_HBW_RANGE_MASK_31_0_0 0x4B00C8107 108#define mmDMA_MACRO_HBW_RANGE_MASK_31_0_1 0x4B00CC109 110#define mmDMA_MACRO_HBW_RANGE_MASK_31_0_2 0x4B00D0111 112#define mmDMA_MACRO_HBW_RANGE_MASK_31_0_3 0x4B00D4113 114#define mmDMA_MACRO_HBW_RANGE_MASK_31_0_4 0x4B00D8115 116#define mmDMA_MACRO_HBW_RANGE_MASK_31_0_5 0x4B00DC117 118#define mmDMA_MACRO_HBW_RANGE_MASK_31_0_6 0x4B00E0119 120#define mmDMA_MACRO_HBW_RANGE_MASK_31_0_7 0x4B00E4121 122#define mmDMA_MACRO_HBW_RANGE_BASE_49_32_0 0x4B00E8123 124#define mmDMA_MACRO_HBW_RANGE_BASE_49_32_1 0x4B00EC125 126#define mmDMA_MACRO_HBW_RANGE_BASE_49_32_2 0x4B00F0127 128#define mmDMA_MACRO_HBW_RANGE_BASE_49_32_3 0x4B00F4129 130#define mmDMA_MACRO_HBW_RANGE_BASE_49_32_4 0x4B00F8131 132#define mmDMA_MACRO_HBW_RANGE_BASE_49_32_5 0x4B00FC133 134#define mmDMA_MACRO_HBW_RANGE_BASE_49_32_6 0x4B0100135 136#define mmDMA_MACRO_HBW_RANGE_BASE_49_32_7 0x4B0104137 138#define mmDMA_MACRO_HBW_RANGE_BASE_31_0_0 0x4B0108139 140#define mmDMA_MACRO_HBW_RANGE_BASE_31_0_1 0x4B010C141 142#define mmDMA_MACRO_HBW_RANGE_BASE_31_0_2 0x4B0110143 144#define mmDMA_MACRO_HBW_RANGE_BASE_31_0_3 0x4B0114145 146#define mmDMA_MACRO_HBW_RANGE_BASE_31_0_4 0x4B0118147 148#define mmDMA_MACRO_HBW_RANGE_BASE_31_0_5 0x4B011C149 150#define mmDMA_MACRO_HBW_RANGE_BASE_31_0_6 0x4B0120151 152#define mmDMA_MACRO_HBW_RANGE_BASE_31_0_7 0x4B0124153 154#define mmDMA_MACRO_WRITE_EN 0x4B0128155 156#define mmDMA_MACRO_WRITE_CREDIT 0x4B012C157 158#define mmDMA_MACRO_READ_EN 0x4B0130159 160#define mmDMA_MACRO_READ_CREDIT 0x4B0134161 162#define mmDMA_MACRO_SRAM_BUSY 0x4B0138163 164#define mmDMA_MACRO_RAZWI_LBW_WT_VLD 0x4B013C165 166#define mmDMA_MACRO_RAZWI_LBW_WT_ID 0x4B0140167 168#define mmDMA_MACRO_RAZWI_LBW_RD_VLD 0x4B0144169 170#define mmDMA_MACRO_RAZWI_LBW_RD_ID 0x4B0148171 172#define mmDMA_MACRO_RAZWI_HBW_WT_VLD 0x4B014C173 174#define mmDMA_MACRO_RAZWI_HBW_WT_ID 0x4B0150175 176#define mmDMA_MACRO_RAZWI_HBW_RD_VLD 0x4B0154177 178#define mmDMA_MACRO_RAZWI_HBW_RD_ID 0x4B0158179 180#endif /* ASIC_REG_DMA_MACRO_REGS_H_ */181