105 lines · c
1/* SPDX-License-Identifier: GPL-2.02 *3 * Copyright 2016-2018 HabanaLabs, Ltd.4 * All Rights Reserved.5 *6 */7 8/************************************9 ** This is an auto-generated file **10 ** DO NOT EDIT BELOW **11 ************************************/12 13#ifndef ASIC_REG_IC_PLL_REGS_H_14#define ASIC_REG_IC_PLL_REGS_H_15 16/*17 *****************************************18 * IC_PLL (Prototype: PLL)19 *****************************************20 */21 22#define mmIC_PLL_NR 0x4A310023 24#define mmIC_PLL_NF 0x4A310425 26#define mmIC_PLL_OD 0x4A310827 28#define mmIC_PLL_NB 0x4A310C29 30#define mmIC_PLL_CFG 0x4A311031 32#define mmIC_PLL_LOSE_MASK 0x4A312033 34#define mmIC_PLL_LOCK_INTR 0x4A312835 36#define mmIC_PLL_LOCK_BYPASS 0x4A312C37 38#define mmIC_PLL_DATA_CHNG 0x4A313039 40#define mmIC_PLL_RST 0x4A313441 42#define mmIC_PLL_SLIP_WD_CNTR 0x4A315043 44#define mmIC_PLL_DIV_FACTOR_0 0x4A320045 46#define mmIC_PLL_DIV_FACTOR_1 0x4A320447 48#define mmIC_PLL_DIV_FACTOR_2 0x4A320849 50#define mmIC_PLL_DIV_FACTOR_3 0x4A320C51 52#define mmIC_PLL_DIV_FACTOR_CMD_0 0x4A322053 54#define mmIC_PLL_DIV_FACTOR_CMD_1 0x4A322455 56#define mmIC_PLL_DIV_FACTOR_CMD_2 0x4A322857 58#define mmIC_PLL_DIV_FACTOR_CMD_3 0x4A322C59 60#define mmIC_PLL_DIV_SEL_0 0x4A328061 62#define mmIC_PLL_DIV_SEL_1 0x4A328463 64#define mmIC_PLL_DIV_SEL_2 0x4A328865 66#define mmIC_PLL_DIV_SEL_3 0x4A328C67 68#define mmIC_PLL_DIV_EN_0 0x4A32A069 70#define mmIC_PLL_DIV_EN_1 0x4A32A471 72#define mmIC_PLL_DIV_EN_2 0x4A32A873 74#define mmIC_PLL_DIV_EN_3 0x4A32AC75 76#define mmIC_PLL_DIV_FACTOR_BUSY_0 0x4A32C077 78#define mmIC_PLL_DIV_FACTOR_BUSY_1 0x4A32C479 80#define mmIC_PLL_DIV_FACTOR_BUSY_2 0x4A32C881 82#define mmIC_PLL_DIV_FACTOR_BUSY_3 0x4A32CC83 84#define mmIC_PLL_CLK_GATER 0x4A330085 86#define mmIC_PLL_CLK_RLX_0 0x4A331087 88#define mmIC_PLL_CLK_RLX_1 0x4A331489 90#define mmIC_PLL_CLK_RLX_2 0x4A331891 92#define mmIC_PLL_CLK_RLX_3 0x4A331C93 94#define mmIC_PLL_REF_CNTR_PERIOD 0x4A340095 96#define mmIC_PLL_REF_LOW_THRESHOLD 0x4A341097 98#define mmIC_PLL_REF_HIGH_THRESHOLD 0x4A342099 100#define mmIC_PLL_PLL_NOT_STABLE 0x4A3430101 102#define mmIC_PLL_FREQ_CALC_EN 0x4A3440103 104#endif /* ASIC_REG_IC_PLL_REGS_H_ */105