331 lines · c
1/* SPDX-License-Identifier: GPL-2.02 *3 * Copyright 2016-2018 HabanaLabs, Ltd.4 * All Rights Reserved.5 *6 */7 8/************************************9 ** This is an auto-generated file **10 ** DO NOT EDIT BELOW **11 ************************************/12 13#ifndef ASIC_REG_MME3_RTR_REGS_H_14#define ASIC_REG_MME3_RTR_REGS_H_15 16/*17 *****************************************18 * MME3_RTR (Prototype: MME_RTR)19 *****************************************20 */21 22#define mmMME3_RTR_HBW_RD_RQ_E_ARB 0xC010023 24#define mmMME3_RTR_HBW_RD_RQ_W_ARB 0xC010425 26#define mmMME3_RTR_HBW_RD_RQ_N_ARB 0xC010827 28#define mmMME3_RTR_HBW_RD_RQ_S_ARB 0xC010C29 30#define mmMME3_RTR_HBW_RD_RQ_L_ARB 0xC011031 32#define mmMME3_RTR_HBW_E_ARB_MAX 0xC012033 34#define mmMME3_RTR_HBW_W_ARB_MAX 0xC012435 36#define mmMME3_RTR_HBW_N_ARB_MAX 0xC012837 38#define mmMME3_RTR_HBW_S_ARB_MAX 0xC012C39 40#define mmMME3_RTR_HBW_L_ARB_MAX 0xC013041 42#define mmMME3_RTR_HBW_RD_RS_MAX_CREDIT 0xC014043 44#define mmMME3_RTR_HBW_WR_RQ_MAX_CREDIT 0xC014445 46#define mmMME3_RTR_HBW_RD_RQ_MAX_CREDIT 0xC014847 48#define mmMME3_RTR_HBW_RD_RS_E_ARB 0xC015049 50#define mmMME3_RTR_HBW_RD_RS_W_ARB 0xC015451 52#define mmMME3_RTR_HBW_RD_RS_N_ARB 0xC015853 54#define mmMME3_RTR_HBW_RD_RS_S_ARB 0xC015C55 56#define mmMME3_RTR_HBW_RD_RS_L_ARB 0xC016057 58#define mmMME3_RTR_HBW_WR_RQ_E_ARB 0xC017059 60#define mmMME3_RTR_HBW_WR_RQ_W_ARB 0xC017461 62#define mmMME3_RTR_HBW_WR_RQ_N_ARB 0xC017863 64#define mmMME3_RTR_HBW_WR_RQ_S_ARB 0xC017C65 66#define mmMME3_RTR_HBW_WR_RQ_L_ARB 0xC018067 68#define mmMME3_RTR_HBW_WR_RS_E_ARB 0xC019069 70#define mmMME3_RTR_HBW_WR_RS_W_ARB 0xC019471 72#define mmMME3_RTR_HBW_WR_RS_N_ARB 0xC019873 74#define mmMME3_RTR_HBW_WR_RS_S_ARB 0xC019C75 76#define mmMME3_RTR_HBW_WR_RS_L_ARB 0xC01A077 78#define mmMME3_RTR_LBW_RD_RQ_E_ARB 0xC020079 80#define mmMME3_RTR_LBW_RD_RQ_W_ARB 0xC020481 82#define mmMME3_RTR_LBW_RD_RQ_N_ARB 0xC020883 84#define mmMME3_RTR_LBW_RD_RQ_S_ARB 0xC020C85 86#define mmMME3_RTR_LBW_RD_RQ_L_ARB 0xC021087 88#define mmMME3_RTR_LBW_E_ARB_MAX 0xC022089 90#define mmMME3_RTR_LBW_W_ARB_MAX 0xC022491 92#define mmMME3_RTR_LBW_N_ARB_MAX 0xC022893 94#define mmMME3_RTR_LBW_S_ARB_MAX 0xC022C95 96#define mmMME3_RTR_LBW_L_ARB_MAX 0xC023097 98#define mmMME3_RTR_LBW_SRAM_MAX_CREDIT 0xC024099 100#define mmMME3_RTR_LBW_RD_RS_E_ARB 0xC0250101 102#define mmMME3_RTR_LBW_RD_RS_W_ARB 0xC0254103 104#define mmMME3_RTR_LBW_RD_RS_N_ARB 0xC0258105 106#define mmMME3_RTR_LBW_RD_RS_S_ARB 0xC025C107 108#define mmMME3_RTR_LBW_RD_RS_L_ARB 0xC0260109 110#define mmMME3_RTR_LBW_WR_RQ_E_ARB 0xC0270111 112#define mmMME3_RTR_LBW_WR_RQ_W_ARB 0xC0274113 114#define mmMME3_RTR_LBW_WR_RQ_N_ARB 0xC0278115 116#define mmMME3_RTR_LBW_WR_RQ_S_ARB 0xC027C117 118#define mmMME3_RTR_LBW_WR_RQ_L_ARB 0xC0280119 120#define mmMME3_RTR_LBW_WR_RS_E_ARB 0xC0290121 122#define mmMME3_RTR_LBW_WR_RS_W_ARB 0xC0294123 124#define mmMME3_RTR_LBW_WR_RS_N_ARB 0xC0298125 126#define mmMME3_RTR_LBW_WR_RS_S_ARB 0xC029C127 128#define mmMME3_RTR_LBW_WR_RS_L_ARB 0xC02A0129 130#define mmMME3_RTR_DBG_E_ARB 0xC0300131 132#define mmMME3_RTR_DBG_W_ARB 0xC0304133 134#define mmMME3_RTR_DBG_N_ARB 0xC0308135 136#define mmMME3_RTR_DBG_S_ARB 0xC030C137 138#define mmMME3_RTR_DBG_L_ARB 0xC0310139 140#define mmMME3_RTR_DBG_E_ARB_MAX 0xC0320141 142#define mmMME3_RTR_DBG_W_ARB_MAX 0xC0324143 144#define mmMME3_RTR_DBG_N_ARB_MAX 0xC0328145 146#define mmMME3_RTR_DBG_S_ARB_MAX 0xC032C147 148#define mmMME3_RTR_DBG_L_ARB_MAX 0xC0330149 150#define mmMME3_RTR_SPLIT_COEF_0 0xC0400151 152#define mmMME3_RTR_SPLIT_COEF_1 0xC0404153 154#define mmMME3_RTR_SPLIT_COEF_2 0xC0408155 156#define mmMME3_RTR_SPLIT_COEF_3 0xC040C157 158#define mmMME3_RTR_SPLIT_COEF_4 0xC0410159 160#define mmMME3_RTR_SPLIT_COEF_5 0xC0414161 162#define mmMME3_RTR_SPLIT_COEF_6 0xC0418163 164#define mmMME3_RTR_SPLIT_COEF_7 0xC041C165 166#define mmMME3_RTR_SPLIT_COEF_8 0xC0420167 168#define mmMME3_RTR_SPLIT_COEF_9 0xC0424169 170#define mmMME3_RTR_SPLIT_CFG 0xC0440171 172#define mmMME3_RTR_SPLIT_RD_SAT 0xC0444173 174#define mmMME3_RTR_SPLIT_RD_RST_TOKEN 0xC0448175 176#define mmMME3_RTR_SPLIT_RD_TIMEOUT_0 0xC044C177 178#define mmMME3_RTR_SPLIT_RD_TIMEOUT_1 0xC0450179 180#define mmMME3_RTR_SPLIT_WR_SAT 0xC0454181 182#define mmMME3_RTR_WPLIT_WR_TST_TOLEN 0xC0458183 184#define mmMME3_RTR_SPLIT_WR_TIMEOUT_0 0xC045C185 186#define mmMME3_RTR_SPLIT_WR_TIMEOUT_1 0xC0460187 188#define mmMME3_RTR_HBW_RANGE_HIT 0xC0470189 190#define mmMME3_RTR_HBW_RANGE_MASK_L_0 0xC0480191 192#define mmMME3_RTR_HBW_RANGE_MASK_L_1 0xC0484193 194#define mmMME3_RTR_HBW_RANGE_MASK_L_2 0xC0488195 196#define mmMME3_RTR_HBW_RANGE_MASK_L_3 0xC048C197 198#define mmMME3_RTR_HBW_RANGE_MASK_L_4 0xC0490199 200#define mmMME3_RTR_HBW_RANGE_MASK_L_5 0xC0494201 202#define mmMME3_RTR_HBW_RANGE_MASK_L_6 0xC0498203 204#define mmMME3_RTR_HBW_RANGE_MASK_L_7 0xC049C205 206#define mmMME3_RTR_HBW_RANGE_MASK_H_0 0xC04A0207 208#define mmMME3_RTR_HBW_RANGE_MASK_H_1 0xC04A4209 210#define mmMME3_RTR_HBW_RANGE_MASK_H_2 0xC04A8211 212#define mmMME3_RTR_HBW_RANGE_MASK_H_3 0xC04AC213 214#define mmMME3_RTR_HBW_RANGE_MASK_H_4 0xC04B0215 216#define mmMME3_RTR_HBW_RANGE_MASK_H_5 0xC04B4217 218#define mmMME3_RTR_HBW_RANGE_MASK_H_6 0xC04B8219 220#define mmMME3_RTR_HBW_RANGE_MASK_H_7 0xC04BC221 222#define mmMME3_RTR_HBW_RANGE_BASE_L_0 0xC04C0223 224#define mmMME3_RTR_HBW_RANGE_BASE_L_1 0xC04C4225 226#define mmMME3_RTR_HBW_RANGE_BASE_L_2 0xC04C8227 228#define mmMME3_RTR_HBW_RANGE_BASE_L_3 0xC04CC229 230#define mmMME3_RTR_HBW_RANGE_BASE_L_4 0xC04D0231 232#define mmMME3_RTR_HBW_RANGE_BASE_L_5 0xC04D4233 234#define mmMME3_RTR_HBW_RANGE_BASE_L_6 0xC04D8235 236#define mmMME3_RTR_HBW_RANGE_BASE_L_7 0xC04DC237 238#define mmMME3_RTR_HBW_RANGE_BASE_H_0 0xC04E0239 240#define mmMME3_RTR_HBW_RANGE_BASE_H_1 0xC04E4241 242#define mmMME3_RTR_HBW_RANGE_BASE_H_2 0xC04E8243 244#define mmMME3_RTR_HBW_RANGE_BASE_H_3 0xC04EC245 246#define mmMME3_RTR_HBW_RANGE_BASE_H_4 0xC04F0247 248#define mmMME3_RTR_HBW_RANGE_BASE_H_5 0xC04F4249 250#define mmMME3_RTR_HBW_RANGE_BASE_H_6 0xC04F8251 252#define mmMME3_RTR_HBW_RANGE_BASE_H_7 0xC04FC253 254#define mmMME3_RTR_LBW_RANGE_HIT 0xC0500255 256#define mmMME3_RTR_LBW_RANGE_MASK_0 0xC0510257 258#define mmMME3_RTR_LBW_RANGE_MASK_1 0xC0514259 260#define mmMME3_RTR_LBW_RANGE_MASK_2 0xC0518261 262#define mmMME3_RTR_LBW_RANGE_MASK_3 0xC051C263 264#define mmMME3_RTR_LBW_RANGE_MASK_4 0xC0520265 266#define mmMME3_RTR_LBW_RANGE_MASK_5 0xC0524267 268#define mmMME3_RTR_LBW_RANGE_MASK_6 0xC0528269 270#define mmMME3_RTR_LBW_RANGE_MASK_7 0xC052C271 272#define mmMME3_RTR_LBW_RANGE_MASK_8 0xC0530273 274#define mmMME3_RTR_LBW_RANGE_MASK_9 0xC0534275 276#define mmMME3_RTR_LBW_RANGE_MASK_10 0xC0538277 278#define mmMME3_RTR_LBW_RANGE_MASK_11 0xC053C279 280#define mmMME3_RTR_LBW_RANGE_MASK_12 0xC0540281 282#define mmMME3_RTR_LBW_RANGE_MASK_13 0xC0544283 284#define mmMME3_RTR_LBW_RANGE_MASK_14 0xC0548285 286#define mmMME3_RTR_LBW_RANGE_MASK_15 0xC054C287 288#define mmMME3_RTR_LBW_RANGE_BASE_0 0xC0550289 290#define mmMME3_RTR_LBW_RANGE_BASE_1 0xC0554291 292#define mmMME3_RTR_LBW_RANGE_BASE_2 0xC0558293 294#define mmMME3_RTR_LBW_RANGE_BASE_3 0xC055C295 296#define mmMME3_RTR_LBW_RANGE_BASE_4 0xC0560297 298#define mmMME3_RTR_LBW_RANGE_BASE_5 0xC0564299 300#define mmMME3_RTR_LBW_RANGE_BASE_6 0xC0568301 302#define mmMME3_RTR_LBW_RANGE_BASE_7 0xC056C303 304#define mmMME3_RTR_LBW_RANGE_BASE_8 0xC0570305 306#define mmMME3_RTR_LBW_RANGE_BASE_9 0xC0574307 308#define mmMME3_RTR_LBW_RANGE_BASE_10 0xC0578309 310#define mmMME3_RTR_LBW_RANGE_BASE_11 0xC057C311 312#define mmMME3_RTR_LBW_RANGE_BASE_12 0xC0580313 314#define mmMME3_RTR_LBW_RANGE_BASE_13 0xC0584315 316#define mmMME3_RTR_LBW_RANGE_BASE_14 0xC0588317 318#define mmMME3_RTR_LBW_RANGE_BASE_15 0xC058C319 320#define mmMME3_RTR_RGLTR 0xC0590321 322#define mmMME3_RTR_RGLTR_WR_RESULT 0xC0594323 324#define mmMME3_RTR_RGLTR_RD_RESULT 0xC0598325 326#define mmMME3_RTR_SCRAMB_EN 0xC0600327 328#define mmMME3_RTR_NON_LIN_SCRAMB 0xC0604329 330#endif /* ASIC_REG_MME3_RTR_REGS_H_ */331