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1/* SPDX-License-Identifier: GPL-2.02 *3 * Copyright 2016-2018 HabanaLabs, Ltd.4 * All Rights Reserved.5 *6 */7 8/************************************9 ** This is an auto-generated file **10 ** DO NOT EDIT BELOW **11 ************************************/12 13#ifndef ASIC_REG_TPC3_CMDQ_REGS_H_14#define ASIC_REG_TPC3_CMDQ_REGS_H_15 16/*17 *****************************************18 * TPC3_CMDQ (Prototype: CMDQ)19 *****************************************20 */21 22#define mmTPC3_CMDQ_GLBL_CFG0 0xEC900023 24#define mmTPC3_CMDQ_GLBL_CFG1 0xEC900425 26#define mmTPC3_CMDQ_GLBL_PROT 0xEC900827 28#define mmTPC3_CMDQ_GLBL_ERR_CFG 0xEC900C29 30#define mmTPC3_CMDQ_GLBL_ERR_ADDR_LO 0xEC901031 32#define mmTPC3_CMDQ_GLBL_ERR_ADDR_HI 0xEC901433 34#define mmTPC3_CMDQ_GLBL_ERR_WDATA 0xEC901835 36#define mmTPC3_CMDQ_GLBL_SECURE_PROPS 0xEC901C37 38#define mmTPC3_CMDQ_GLBL_NON_SECURE_PROPS 0xEC902039 40#define mmTPC3_CMDQ_GLBL_STS0 0xEC902441 42#define mmTPC3_CMDQ_GLBL_STS1 0xEC902843 44#define mmTPC3_CMDQ_CQ_CFG0 0xEC90B045 46#define mmTPC3_CMDQ_CQ_CFG1 0xEC90B447 48#define mmTPC3_CMDQ_CQ_ARUSER 0xEC90B849 50#define mmTPC3_CMDQ_CQ_PTR_LO 0xEC90C051 52#define mmTPC3_CMDQ_CQ_PTR_HI 0xEC90C453 54#define mmTPC3_CMDQ_CQ_TSIZE 0xEC90C855 56#define mmTPC3_CMDQ_CQ_CTL 0xEC90CC57 58#define mmTPC3_CMDQ_CQ_PTR_LO_STS 0xEC90D459 60#define mmTPC3_CMDQ_CQ_PTR_HI_STS 0xEC90D861 62#define mmTPC3_CMDQ_CQ_TSIZE_STS 0xEC90DC63 64#define mmTPC3_CMDQ_CQ_CTL_STS 0xEC90E065 66#define mmTPC3_CMDQ_CQ_STS0 0xEC90E467 68#define mmTPC3_CMDQ_CQ_STS1 0xEC90E869 70#define mmTPC3_CMDQ_CQ_RD_RATE_LIM_EN 0xEC90F071 72#define mmTPC3_CMDQ_CQ_RD_RATE_LIM_RST_TOKEN 0xEC90F473 74#define mmTPC3_CMDQ_CQ_RD_RATE_LIM_SAT 0xEC90F875 76#define mmTPC3_CMDQ_CQ_RD_RATE_LIM_TOUT 0xEC90FC77 78#define mmTPC3_CMDQ_CQ_IFIFO_CNT 0xEC910879 80#define mmTPC3_CMDQ_CP_MSG_BASE0_ADDR_LO 0xEC912081 82#define mmTPC3_CMDQ_CP_MSG_BASE0_ADDR_HI 0xEC912483 84#define mmTPC3_CMDQ_CP_MSG_BASE1_ADDR_LO 0xEC912885 86#define mmTPC3_CMDQ_CP_MSG_BASE1_ADDR_HI 0xEC912C87 88#define mmTPC3_CMDQ_CP_MSG_BASE2_ADDR_LO 0xEC913089 90#define mmTPC3_CMDQ_CP_MSG_BASE2_ADDR_HI 0xEC913491 92#define mmTPC3_CMDQ_CP_MSG_BASE3_ADDR_LO 0xEC913893 94#define mmTPC3_CMDQ_CP_MSG_BASE3_ADDR_HI 0xEC913C95 96#define mmTPC3_CMDQ_CP_LDMA_TSIZE_OFFSET 0xEC914097 98#define mmTPC3_CMDQ_CP_LDMA_SRC_BASE_LO_OFFSET 0xEC914499 100#define mmTPC3_CMDQ_CP_LDMA_SRC_BASE_HI_OFFSET 0xEC9148101 102#define mmTPC3_CMDQ_CP_LDMA_DST_BASE_LO_OFFSET 0xEC914C103 104#define mmTPC3_CMDQ_CP_LDMA_DST_BASE_HI_OFFSET 0xEC9150105 106#define mmTPC3_CMDQ_CP_LDMA_COMMIT_OFFSET 0xEC9154107 108#define mmTPC3_CMDQ_CP_FENCE0_RDATA 0xEC9158109 110#define mmTPC3_CMDQ_CP_FENCE1_RDATA 0xEC915C111 112#define mmTPC3_CMDQ_CP_FENCE2_RDATA 0xEC9160113 114#define mmTPC3_CMDQ_CP_FENCE3_RDATA 0xEC9164115 116#define mmTPC3_CMDQ_CP_FENCE0_CNT 0xEC9168117 118#define mmTPC3_CMDQ_CP_FENCE1_CNT 0xEC916C119 120#define mmTPC3_CMDQ_CP_FENCE2_CNT 0xEC9170121 122#define mmTPC3_CMDQ_CP_FENCE3_CNT 0xEC9174123 124#define mmTPC3_CMDQ_CP_STS 0xEC9178125 126#define mmTPC3_CMDQ_CP_CURRENT_INST_LO 0xEC917C127 128#define mmTPC3_CMDQ_CP_CURRENT_INST_HI 0xEC9180129 130#define mmTPC3_CMDQ_CP_BARRIER_CFG 0xEC9184131 132#define mmTPC3_CMDQ_CP_DBG_0 0xEC9188133 134#define mmTPC3_CMDQ_CQ_BUF_ADDR 0xEC9308135 136#define mmTPC3_CMDQ_CQ_BUF_RDATA 0xEC930C137 138#endif /* ASIC_REG_TPC3_CMDQ_REGS_H_ */139