105 lines · c
1/* SPDX-License-Identifier: GPL-2.02 *3 * Copyright 2016-2018 HabanaLabs, Ltd.4 * All Rights Reserved.5 *6 */7 8/************************************9 ** This is an auto-generated file **10 ** DO NOT EDIT BELOW **11 ************************************/12 13#ifndef ASIC_REG_TPC_PLL_REGS_H_14#define ASIC_REG_TPC_PLL_REGS_H_15 16/*17 *****************************************18 * TPC_PLL (Prototype: PLL)19 *****************************************20 */21 22#define mmTPC_PLL_NR 0xE0110023 24#define mmTPC_PLL_NF 0xE0110425 26#define mmTPC_PLL_OD 0xE0110827 28#define mmTPC_PLL_NB 0xE0110C29 30#define mmTPC_PLL_CFG 0xE0111031 32#define mmTPC_PLL_LOSE_MASK 0xE0112033 34#define mmTPC_PLL_LOCK_INTR 0xE0112835 36#define mmTPC_PLL_LOCK_BYPASS 0xE0112C37 38#define mmTPC_PLL_DATA_CHNG 0xE0113039 40#define mmTPC_PLL_RST 0xE0113441 42#define mmTPC_PLL_SLIP_WD_CNTR 0xE0115043 44#define mmTPC_PLL_DIV_FACTOR_0 0xE0120045 46#define mmTPC_PLL_DIV_FACTOR_1 0xE0120447 48#define mmTPC_PLL_DIV_FACTOR_2 0xE0120849 50#define mmTPC_PLL_DIV_FACTOR_3 0xE0120C51 52#define mmTPC_PLL_DIV_FACTOR_CMD_0 0xE0122053 54#define mmTPC_PLL_DIV_FACTOR_CMD_1 0xE0122455 56#define mmTPC_PLL_DIV_FACTOR_CMD_2 0xE0122857 58#define mmTPC_PLL_DIV_FACTOR_CMD_3 0xE0122C59 60#define mmTPC_PLL_DIV_SEL_0 0xE0128061 62#define mmTPC_PLL_DIV_SEL_1 0xE0128463 64#define mmTPC_PLL_DIV_SEL_2 0xE0128865 66#define mmTPC_PLL_DIV_SEL_3 0xE0128C67 68#define mmTPC_PLL_DIV_EN_0 0xE012A069 70#define mmTPC_PLL_DIV_EN_1 0xE012A471 72#define mmTPC_PLL_DIV_EN_2 0xE012A873 74#define mmTPC_PLL_DIV_EN_3 0xE012AC75 76#define mmTPC_PLL_DIV_FACTOR_BUSY_0 0xE012C077 78#define mmTPC_PLL_DIV_FACTOR_BUSY_1 0xE012C479 80#define mmTPC_PLL_DIV_FACTOR_BUSY_2 0xE012C881 82#define mmTPC_PLL_DIV_FACTOR_BUSY_3 0xE012CC83 84#define mmTPC_PLL_CLK_GATER 0xE0130085 86#define mmTPC_PLL_CLK_RLX_0 0xE0131087 88#define mmTPC_PLL_CLK_RLX_1 0xE0131489 90#define mmTPC_PLL_CLK_RLX_2 0xE0131891 92#define mmTPC_PLL_CLK_RLX_3 0xE0131C93 94#define mmTPC_PLL_REF_CNTR_PERIOD 0xE0140095 96#define mmTPC_PLL_REF_LOW_THRESHOLD 0xE0141097 98#define mmTPC_PLL_REF_HIGH_THRESHOLD 0xE0142099 100#define mmTPC_PLL_PLL_NOT_STABLE 0xE01430101 102#define mmTPC_PLL_FREQ_CALC_EN 0xE01440103 104#endif /* ASIC_REG_TPC_PLL_REGS_H_ */105