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1// RUN: %clang_cc1 -std=hlsl2021 -finclude-default-header -fnative-half-type -fnative-int16-type -triple \2// RUN: dxil-pc-shadermodel6.3-compute %s -emit-llvm -disable-llvm-passes -o - | \3// RUN: FileCheck %s --check-prefixes=CHECK,CHECK-DXIL4// RUN: %clang_cc1 -std=hlsl2021 -finclude-default-header -fnative-half-type -fnative-int16-type -triple \5// RUN: spirv-pc-vulkan-compute %s -emit-llvm -disable-llvm-passes -o - | \6// RUN: FileCheck %s --check-prefixes=CHECK,CHECK-SPIRV7 8// Test basic lowering to runtime function call for int values.9 10// CHECK-LABEL: test_int11int test_int(int expr, uint idx) {12 // CHECK-SPIRV: %[[#entry_tok0:]] = call token @llvm.experimental.convergence.entry()13 // CHECK-SPIRV: %[[RET:.*]] = call spir_func [[TY:.*]] @llvm.spv.wave.readlane.i32([[TY]] %[[#]], i32 %[[#]]) [ "convergencectrl"(token %[[#entry_tok0]]) ]14 // CHECK-DXIL: %[[RET:.*]] = call [[TY:.*]] @llvm.dx.wave.readlane.i32([[TY]] %[[#]], i32 %[[#]])15 // CHECK: ret [[TY]] %[[RET]]16 return WaveReadLaneAt(expr, idx);17}18 19// CHECK-DXIL: declare [[TY]] @llvm.dx.wave.readlane.i32([[TY]], i32) #[[#attr:]]20// CHECK-SPIRV: declare [[TY]] @llvm.spv.wave.readlane.i32([[TY]], i32) #[[#attr:]]21 22// CHECK-LABEL: test_uint23uint test_uint(uint expr, uint idx) {24 // CHECK-SPIRV: %[[#entry_tok0:]] = call token @llvm.experimental.convergence.entry()25 // CHECK-SPIRV: %[[RET:.*]] = call spir_func [[TY:.*]] @llvm.spv.wave.readlane.i32([[TY]] %[[#]], i32 %[[#]]) [ "convergencectrl"(token %[[#entry_tok0]]) ]26 // CHECK-DXIL: %[[RET:.*]] = call [[TY:.*]] @llvm.dx.wave.readlane.i32([[TY]] %[[#]], i32 %[[#]])27 // CHECK: ret [[TY]] %[[RET]]28 return WaveReadLaneAt(expr, idx);29}30 31// CHECK-LABEL: test_int64_t32int64_t test_int64_t(int64_t expr, uint idx) {33 // CHECK-SPIRV: %[[#entry_tok0:]] = call token @llvm.experimental.convergence.entry()34 // CHECK-SPIRV: %[[RET:.*]] = call spir_func [[TY:.*]] @llvm.spv.wave.readlane.i64([[TY]] %[[#]], i32 %[[#]]) [ "convergencectrl"(token %[[#entry_tok0]]) ]35 // CHECK-DXIL: %[[RET:.*]] = call [[TY:.*]] @llvm.dx.wave.readlane.i64([[TY]] %[[#]], i32 %[[#]])36 // CHECK: ret [[TY]] %[[RET]]37 return WaveReadLaneAt(expr, idx);38}39 40// CHECK-DXIL: declare [[TY]] @llvm.dx.wave.readlane.i64([[TY]], i32) #[[#attr:]]41// CHECK-SPIRV: declare [[TY]] @llvm.spv.wave.readlane.i64([[TY]], i32) #[[#attr:]]42 43// CHECK-LABEL: test_uint64_t44uint64_t test_uint64_t(uint64_t expr, uint idx) {45 // CHECK-SPIRV: %[[#entry_tok0:]] = call token @llvm.experimental.convergence.entry()46 // CHECK-SPIRV: %[[RET:.*]] = call spir_func [[TY:.*]] @llvm.spv.wave.readlane.i64([[TY]] %[[#]], i32 %[[#]]) [ "convergencectrl"(token %[[#entry_tok0]]) ]47 // CHECK-DXIL: %[[RET:.*]] = call [[TY:.*]] @llvm.dx.wave.readlane.i64([[TY]] %[[#]], i32 %[[#]])48 // CHECK: ret [[TY]] %[[RET]]49 return WaveReadLaneAt(expr, idx);50}51 52#ifdef __HLSL_ENABLE_16_BIT53// CHECK-LABEL: test_int1654int16_t test_int16(int16_t expr, uint idx) {55 // CHECK-SPIRV: %[[#entry_tok1:]] = call token @llvm.experimental.convergence.entry()56 // CHECK-SPIRV: %[[RET:.*]] = call spir_func [[TY:.*]] @llvm.spv.wave.readlane.i16([[TY]] %[[#]], i32 %[[#]]) [ "convergencectrl"(token %[[#entry_tok1]]) ]57 // CHECK-DXIL: %[[RET:.*]] = call [[TY:.*]] @llvm.dx.wave.readlane.i16([[TY]] %[[#]], i32 %[[#]])58 // CHECK: ret [[TY]] %[[RET]]59 return WaveReadLaneAt(expr, idx);60}61 62// CHECK-DXIL: declare [[TY]] @llvm.dx.wave.readlane.i16([[TY]], i32) #[[#attr:]]63// CHECK-SPIRV: declare [[TY]] @llvm.spv.wave.readlane.i16([[TY]], i32) #[[#attr:]]64 65// CHECK-LABEL: test_uint1666uint16_t test_uint16(uint16_t expr, uint idx) {67 // CHECK-SPIRV: %[[#entry_tok1:]] = call token @llvm.experimental.convergence.entry()68 // CHECK-SPIRV: %[[RET:.*]] = call spir_func [[TY:.*]] @llvm.spv.wave.readlane.i16([[TY]] %[[#]], i32 %[[#]]) [ "convergencectrl"(token %[[#entry_tok1]]) ]69 // CHECK-DXIL: %[[RET:.*]] = call [[TY:.*]] @llvm.dx.wave.readlane.i16([[TY]] %[[#]], i32 %[[#]])70 // CHECK: ret [[TY]] %[[RET]]71 return WaveReadLaneAt(expr, idx);72}73#endif74 75// Test basic lowering to runtime function call with array and float values.76 77// CHECK-LABEL: test_half78half test_half(half expr, uint idx) {79 // CHECK-SPIRV: %[[#entry_tok2:]] = call token @llvm.experimental.convergence.entry()80 // CHECK-SPIRV: %[[RET:.*]] = call reassoc nnan ninf nsz arcp afn spir_func [[TY:.*]] @llvm.spv.wave.readlane.f16([[TY]] %[[#]], i32 %[[#]]) [ "convergencectrl"(token %[[#entry_tok2]]) ]81 // CHECK-DXIL: %[[RET:.*]] = call reassoc nnan ninf nsz arcp afn [[TY:.*]] @llvm.dx.wave.readlane.f16([[TY]] %[[#]], i32 %[[#]])82 // CHECK: ret [[TY]] %[[RET]]83 return WaveReadLaneAt(expr, idx);84}85 86// CHECK-DXIL: declare [[TY]] @llvm.dx.wave.readlane.f16([[TY]], i32) #[[#attr:]]87// CHECK-SPIRV: declare [[TY]] @llvm.spv.wave.readlane.f16([[TY]], i32) #[[#attr:]]88 89// CHECK-LABEL: test_double90double test_double(double expr, uint idx) {91 // CHECK-SPIRV: %[[#entry_tok3:]] = call token @llvm.experimental.convergence.entry()92 // CHECK-SPIRV: %[[RET:.*]] = call reassoc nnan ninf nsz arcp afn spir_func [[TY:.*]] @llvm.spv.wave.readlane.f64([[TY]] %[[#]], i32 %[[#]]) [ "convergencectrl"(token %[[#entry_tok3]]) ]93 // CHECK-DXIL: %[[RET:.*]] = call reassoc nnan ninf nsz arcp afn [[TY:.*]] @llvm.dx.wave.readlane.f64([[TY]] %[[#]], i32 %[[#]])94 // CHECK: ret [[TY]] %[[RET]]95 return WaveReadLaneAt(expr, idx);96}97 98// CHECK-DXIL: declare [[TY]] @llvm.dx.wave.readlane.f64([[TY]], i32) #[[#attr:]]99// CHECK-SPIRV: declare [[TY]] @llvm.spv.wave.readlane.f64([[TY]], i32) #[[#attr:]]100 101// CHECK-LABEL: test_floatv4102float4 test_floatv4(float4 expr, uint idx) {103 // CHECK-SPIRV: %[[#entry_tok4:]] = call token @llvm.experimental.convergence.entry()104 // CHECK-SPIRV: %[[RET1:.*]] = call reassoc nnan ninf nsz arcp afn spir_func [[TY1:.*]] @llvm.spv.wave.readlane.v4f32([[TY1]] %[[#]], i32 %[[#]]) [ "convergencectrl"(token %[[#entry_tok4]]) ]105 // CHECK-DXIL: %[[RET1:.*]] = call reassoc nnan ninf nsz arcp afn [[TY1:.*]] @llvm.dx.wave.readlane.v4f32([[TY1]] %[[#]], i32 %[[#]])106 // CHECK: ret [[TY1]] %[[RET1]]107 return WaveReadLaneAt(expr, idx);108}109 110// CHECK-DXIL: declare [[TY1]] @llvm.dx.wave.readlane.v4f32([[TY1]], i32) #[[#attr]]111// CHECK-SPIRV: declare [[TY1]] @llvm.spv.wave.readlane.v4f32([[TY1]], i32) #[[#attr]]112 113// CHECK: attributes #[[#attr]] = {{{.*}} convergent {{.*}}}114