144 lines · plain
1// RUN: %clang_cc1 -finclude-default-header -triple dxil-pc-shadermodel6.3-library %s \2// RUN: -fnative-half-type -fnative-int16-type -emit-llvm -disable-llvm-passes -o - | \3// RUN: FileCheck %s --check-prefixes=CHECK,NATIVE_HALF \4// RUN: -DTARGET=dx -DFNATTRS="hidden noundef" -DFFNATTRS="nofpclass(nan inf)"5// RUN: %clang_cc1 -finclude-default-header -triple dxil-pc-shadermodel6.3-library %s \6// RUN: -emit-llvm -disable-llvm-passes -o - | \7// RUN: FileCheck %s --check-prefixes=CHECK,NO_HALF \8// RUN: -DTARGET=dx -DFNATTRS="hidden noundef" -DFFNATTRS="nofpclass(nan inf)"9// RUN: %clang_cc1 -finclude-default-header -triple spirv-unknown-vulkan-compute %s \10// RUN: -fnative-half-type -fnative-int16-type -emit-llvm -disable-llvm-passes -o - | \11// RUN: FileCheck %s --check-prefixes=CHECK,NATIVE_HALF \12// RUN: -DTARGET=spv -DFNATTRS="hidden spir_func noundef" -DFFNATTRS="nofpclass(nan inf)"13// RUN: %clang_cc1 -finclude-default-header -triple spirv-unknown-vulkan-compute %s \14// RUN: -emit-llvm -disable-llvm-passes -o - | \15// RUN: FileCheck %s --check-prefixes=CHECK,NO_HALF \16// RUN: -DTARGET=spv -DFNATTRS="hidden spir_func noundef" -DFFNATTRS="nofpclass(nan inf)"17 18#ifdef __HLSL_ENABLE_16_BIT19// NATIVE_HALF: define [[FNATTRS]] i16 @_Z16test_clamp_short20// NATIVE_HALF: call i16 @llvm.[[TARGET]].sclamp.i16(21int16_t test_clamp_short(int16_t p0, int16_t p1) { return clamp(p0, p1,p1); }22// NATIVE_HALF: define [[FNATTRS]] <2 x i16> @_Z17test_clamp_short223// NATIVE_HALF: call <2 x i16> @llvm.[[TARGET]].sclamp.v2i16(24int16_t2 test_clamp_short2(int16_t2 p0, int16_t2 p1) { return clamp(p0, p1,p1); }25// NATIVE_HALF: define [[FNATTRS]] <3 x i16> @_Z17test_clamp_short326// NATIVE_HALF: call <3 x i16> @llvm.[[TARGET]].sclamp.v3i1627int16_t3 test_clamp_short3(int16_t3 p0, int16_t3 p1) { return clamp(p0, p1,p1); }28// NATIVE_HALF: define [[FNATTRS]] <4 x i16> @_Z17test_clamp_short429// NATIVE_HALF: call <4 x i16> @llvm.[[TARGET]].sclamp.v4i1630int16_t4 test_clamp_short4(int16_t4 p0, int16_t4 p1) { return clamp(p0, p1,p1); }31 32// NATIVE_HALF: define [[FNATTRS]] i16 @_Z17test_clamp_ushort33// NATIVE_HALF: call i16 @llvm.[[TARGET]].uclamp.i16(34uint16_t test_clamp_ushort(uint16_t p0, uint16_t p1) { return clamp(p0, p1,p1); }35// NATIVE_HALF: define [[FNATTRS]] <2 x i16> @_Z18test_clamp_ushort236// NATIVE_HALF: call <2 x i16> @llvm.[[TARGET]].uclamp.v2i1637uint16_t2 test_clamp_ushort2(uint16_t2 p0, uint16_t2 p1) { return clamp(p0, p1,p1); }38// NATIVE_HALF: define [[FNATTRS]] <3 x i16> @_Z18test_clamp_ushort339// NATIVE_HALF: call <3 x i16> @llvm.[[TARGET]].uclamp.v3i1640uint16_t3 test_clamp_ushort3(uint16_t3 p0, uint16_t3 p1) { return clamp(p0, p1,p1); }41// NATIVE_HALF: define [[FNATTRS]] <4 x i16> @_Z18test_clamp_ushort442// NATIVE_HALF: call <4 x i16> @llvm.[[TARGET]].uclamp.v4i1643uint16_t4 test_clamp_ushort4(uint16_t4 p0, uint16_t4 p1) { return clamp(p0, p1,p1); }44#endif45 46// CHECK: define [[FNATTRS]] i32 @_Z14test_clamp_int47// CHECK: call i32 @llvm.[[TARGET]].sclamp.i32(48int test_clamp_int(int p0, int p1) { return clamp(p0, p1,p1); }49// CHECK: define [[FNATTRS]] <2 x i32> @_Z15test_clamp_int250// CHECK: call <2 x i32> @llvm.[[TARGET]].sclamp.v2i3251int2 test_clamp_int2(int2 p0, int2 p1) { return clamp(p0, p1,p1); }52// CHECK: define [[FNATTRS]] <3 x i32> @_Z15test_clamp_int353// CHECK: call <3 x i32> @llvm.[[TARGET]].sclamp.v3i3254int3 test_clamp_int3(int3 p0, int3 p1) { return clamp(p0, p1,p1); }55// CHECK: define [[FNATTRS]] <4 x i32> @_Z15test_clamp_int456// CHECK: call <4 x i32> @llvm.[[TARGET]].sclamp.v4i3257int4 test_clamp_int4(int4 p0, int4 p1) { return clamp(p0, p1,p1); }58 59// CHECK: define [[FNATTRS]] i32 @_Z15test_clamp_uint60// CHECK: call i32 @llvm.[[TARGET]].uclamp.i32(61int test_clamp_uint(uint p0, uint p1) { return clamp(p0, p1,p1); }62// CHECK: define [[FNATTRS]] <2 x i32> @_Z16test_clamp_uint263// CHECK: call <2 x i32> @llvm.[[TARGET]].uclamp.v2i3264uint2 test_clamp_uint2(uint2 p0, uint2 p1) { return clamp(p0, p1,p1); }65// CHECK: define [[FNATTRS]] <3 x i32> @_Z16test_clamp_uint366// CHECK: call <3 x i32> @llvm.[[TARGET]].uclamp.v3i3267uint3 test_clamp_uint3(uint3 p0, uint3 p1) { return clamp(p0, p1,p1); }68// CHECK: define [[FNATTRS]] <4 x i32> @_Z16test_clamp_uint469// CHECK: call <4 x i32> @llvm.[[TARGET]].uclamp.v4i3270uint4 test_clamp_uint4(uint4 p0, uint4 p1) { return clamp(p0, p1,p1); }71 72// CHECK: define [[FNATTRS]] i64 @_Z15test_clamp_long73// CHECK: call i64 @llvm.[[TARGET]].sclamp.i64(74int64_t test_clamp_long(int64_t p0, int64_t p1) { return clamp(p0, p1,p1); }75// CHECK: define [[FNATTRS]] <2 x i64> @_Z16test_clamp_long276// CHECK: call <2 x i64> @llvm.[[TARGET]].sclamp.v2i6477int64_t2 test_clamp_long2(int64_t2 p0, int64_t2 p1) { return clamp(p0, p1,p1); }78// CHECK: define [[FNATTRS]] <3 x i64> @_Z16test_clamp_long379// CHECK: call <3 x i64> @llvm.[[TARGET]].sclamp.v3i6480int64_t3 test_clamp_long3(int64_t3 p0, int64_t3 p1) { return clamp(p0, p1,p1); }81// CHECK: define [[FNATTRS]] <4 x i64> @_Z16test_clamp_long482// CHECK: call <4 x i64> @llvm.[[TARGET]].sclamp.v4i6483int64_t4 test_clamp_long4(int64_t4 p0, int64_t4 p1) { return clamp(p0, p1,p1); }84 85// CHECK: define [[FNATTRS]] i64 @_Z16test_clamp_ulong86// CHECK: call i64 @llvm.[[TARGET]].uclamp.i64(87uint64_t test_clamp_ulong(uint64_t p0, uint64_t p1) { return clamp(p0, p1,p1); }88// CHECK: define [[FNATTRS]] <2 x i64> @_Z17test_clamp_ulong289// CHECK: call <2 x i64> @llvm.[[TARGET]].uclamp.v2i6490uint64_t2 test_clamp_ulong2(uint64_t2 p0, uint64_t2 p1) { return clamp(p0, p1,p1); }91// CHECK: define [[FNATTRS]] <3 x i64> @_Z17test_clamp_ulong392// CHECK: call <3 x i64> @llvm.[[TARGET]].uclamp.v3i6493uint64_t3 test_clamp_ulong3(uint64_t3 p0, uint64_t3 p1) { return clamp(p0, p1,p1); }94// CHECK: define [[FNATTRS]] <4 x i64> @_Z17test_clamp_ulong495// CHECK: call <4 x i64> @llvm.[[TARGET]].uclamp.v4i6496uint64_t4 test_clamp_ulong4(uint64_t4 p0, uint64_t4 p1) { return clamp(p0, p1,p1); }97 98// NATIVE_HALF: define [[FNATTRS]] [[FFNATTRS]] half @_Z15test_clamp_half99// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn half @llvm.[[TARGET]].nclamp.f16(100// NO_HALF: define [[FNATTRS]] [[FFNATTRS]] float @_Z15test_clamp_half101// NO_HALF: call reassoc nnan ninf nsz arcp afn float @llvm.[[TARGET]].nclamp.f32(102half test_clamp_half(half p0, half p1) { return clamp(p0, p1,p1); }103// NATIVE_HALF: define [[FNATTRS]] [[FFNATTRS]] <2 x half> @_Z16test_clamp_half2104// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <2 x half> @llvm.[[TARGET]].nclamp.v2f16105// NO_HALF: define [[FNATTRS]] [[FFNATTRS]] <2 x float> @_Z16test_clamp_half2106// NO_HALF: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.[[TARGET]].nclamp.v2f32(107half2 test_clamp_half2(half2 p0, half2 p1) { return clamp(p0, p1,p1); }108// NATIVE_HALF: define [[FNATTRS]] [[FFNATTRS]] <3 x half> @_Z16test_clamp_half3109// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <3 x half> @llvm.[[TARGET]].nclamp.v3f16110// NO_HALF: define [[FNATTRS]] [[FFNATTRS]] <3 x float> @_Z16test_clamp_half3111// NO_HALF: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.[[TARGET]].nclamp.v3f32(112half3 test_clamp_half3(half3 p0, half3 p1) { return clamp(p0, p1,p1); }113// NATIVE_HALF: define [[FNATTRS]] [[FFNATTRS]] <4 x half> @_Z16test_clamp_half4114// NATIVE_HALF: call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.[[TARGET]].nclamp.v4f16115// NO_HALF: define [[FNATTRS]] [[FFNATTRS]] <4 x float> @_Z16test_clamp_half4116// NO_HALF: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.[[TARGET]].nclamp.v4f32(117half4 test_clamp_half4(half4 p0, half4 p1) { return clamp(p0, p1,p1); }118 119// CHECK: define [[FNATTRS]] [[FFNATTRS]] float @_Z16test_clamp_float120// CHECK: call reassoc nnan ninf nsz arcp afn float @llvm.[[TARGET]].nclamp.f32(121float test_clamp_float(float p0, float p1) { return clamp(p0, p1,p1); }122// CHECK: define [[FNATTRS]] [[FFNATTRS]] <2 x float> @_Z17test_clamp_float2123// CHECK: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.[[TARGET]].nclamp.v2f32124float2 test_clamp_float2(float2 p0, float2 p1) { return clamp(p0, p1,p1); }125// CHECK: define [[FNATTRS]] [[FFNATTRS]] <3 x float> @_Z17test_clamp_float3126// CHECK: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.[[TARGET]].nclamp.v3f32127float3 test_clamp_float3(float3 p0, float3 p1) { return clamp(p0, p1,p1); }128// CHECK: define [[FNATTRS]] [[FFNATTRS]] <4 x float> @_Z17test_clamp_float4129// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.[[TARGET]].nclamp.v4f32130float4 test_clamp_float4(float4 p0, float4 p1) { return clamp(p0, p1,p1); }131 132// CHECK: define [[FNATTRS]] [[FFNATTRS]] double @_Z17test_clamp_double133// CHECK: call reassoc nnan ninf nsz arcp afn double @llvm.[[TARGET]].nclamp.f64(134double test_clamp_double(double p0, double p1) { return clamp(p0, p1,p1); }135// CHECK: define [[FNATTRS]] [[FFNATTRS]] <2 x double> @_Z18test_clamp_double2136// CHECK: call reassoc nnan ninf nsz arcp afn <2 x double> @llvm.[[TARGET]].nclamp.v2f64137double2 test_clamp_double2(double2 p0, double2 p1) { return clamp(p0, p1,p1); }138// CHECK: define [[FNATTRS]] [[FFNATTRS]] <3 x double> @_Z18test_clamp_double3139// CHECK: call reassoc nnan ninf nsz arcp afn <3 x double> @llvm.[[TARGET]].nclamp.v3f64140double3 test_clamp_double3(double3 p0, double3 p1) { return clamp(p0, p1,p1); }141// CHECK: define [[FNATTRS]] [[FFNATTRS]] <4 x double> @_Z18test_clamp_double4142// CHECK: call reassoc nnan ninf nsz arcp afn <4 x double> @llvm.[[TARGET]].nclamp.v4f64143double4 test_clamp_double4(double4 p0, double4 p1) { return clamp(p0, p1,p1); }144