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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 62; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 < %s | FileCheck %s3 4; Make sure the coalescer doesn't introduce any uses of5; vreg_1024. None are available to allocate with the register budget6; of this function.7 8define void @no_introduce_vreg_1024() #0 {9; CHECK-LABEL: no_introduce_vreg_1024:10; CHECK: ; %bb.0:11; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)12; CHECK-NEXT: ;;#ASMSTART13; CHECK-NEXT: ; def v[0:7]14; CHECK-NEXT: ;;#ASMEND15; CHECK-NEXT: v_mov_b32_e32 v9, v016; CHECK-NEXT: ;;#ASMSTART17; CHECK-NEXT: ; use v[0:15]18; CHECK-NEXT: ;;#ASMEND19; CHECK-NEXT: s_setpc_b64 s[30:31]20 %tuple = call <8 x i32> asm sideeffect "; def $0","=v"()21 %sub0 = extractelement <8 x i32> %tuple, i32 022 %insert = insertelement <16 x i32> poison, i32 %sub0, i32 923 call void asm sideeffect "; use $0","v"(<16 x i32> %insert)24 ret void25}26 27attributes #0 = { nounwind "amdgpu-waves-per-eu"="10,10" }28