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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=amdgcn-amd-amdhsa -O0 -mcpu=gfx1010 < %s | FileCheck --check-prefixes=GFX10-WGP %s3; RUN: llc -mtriple=amdgcn-amd-amdhsa -O0 -mcpu=gfx1010 -mattr=+cumode < %s | FileCheck --check-prefixes=GFX10-CU %s4; RUN: llc -mtriple=amdgcn-amd-amdhsa -O0 -mcpu=gfx1100 < %s | FileCheck --check-prefixes=GFX11-WGP %s5; RUN: llc -mtriple=amdgcn-amd-amdhsa -O0 -mcpu=gfx1100 -mattr=+cumode < %s | FileCheck --check-prefixes=GFX11-CU %s6; RUN: llc -mtriple=amdgcn-amd-amdhsa -O0 -mcpu=gfx1200 < %s | FileCheck --check-prefixes=GFX12-WGP %s7; RUN: llc -mtriple=amdgcn-amd-amdhsa -O0 -mcpu=gfx1200 -mattr=+cumode < %s | FileCheck --check-prefixes=GFX12-CU %s8; RUN: llc -mtriple=amdgcn-amd-amdhsa -O0 -mcpu=gfx1250 < %s | FileCheck --check-prefixes=GFX1250 %s9 10define amdgpu_kernel void @test_s_barrier() {11; GFX10-WGP-LABEL: test_s_barrier:12; GFX10-WGP: ; %bb.0: ; %entry13; GFX10-WGP-NEXT: s_barrier14; GFX10-WGP-NEXT: s_endpgm15;16; GFX10-CU-LABEL: test_s_barrier:17; GFX10-CU: ; %bb.0: ; %entry18; GFX10-CU-NEXT: s_barrier19; GFX10-CU-NEXT: s_endpgm20;21; GFX11-WGP-LABEL: test_s_barrier:22; GFX11-WGP: ; %bb.0: ; %entry23; GFX11-WGP-NEXT: s_barrier24; GFX11-WGP-NEXT: s_endpgm25;26; GFX11-CU-LABEL: test_s_barrier:27; GFX11-CU: ; %bb.0: ; %entry28; GFX11-CU-NEXT: s_barrier29; GFX11-CU-NEXT: s_endpgm30;31; GFX12-WGP-LABEL: test_s_barrier:32; GFX12-WGP: ; %bb.0: ; %entry33; GFX12-WGP-NEXT: s_barrier_signal -134; GFX12-WGP-NEXT: s_barrier_wait -135; GFX12-WGP-NEXT: s_endpgm36;37; GFX12-CU-LABEL: test_s_barrier:38; GFX12-CU: ; %bb.0: ; %entry39; GFX12-CU-NEXT: s_barrier_signal -140; GFX12-CU-NEXT: s_barrier_wait -141; GFX12-CU-NEXT: s_endpgm42;43; GFX1250-LABEL: test_s_barrier:44; GFX1250: ; %bb.0: ; %entry45; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 146; GFX1250-NEXT: s_barrier_signal -147; GFX1250-NEXT: s_barrier_wait -148; GFX1250-NEXT: s_endpgm49entry:50 call void @llvm.amdgcn.s.barrier()51 ret void52}53 54define amdgpu_kernel void @test_s_barrier_workgroup_fence() {55; GFX10-WGP-LABEL: test_s_barrier_workgroup_fence:56; GFX10-WGP: ; %bb.0: ; %entry57; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)58; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x059; GFX10-WGP-NEXT: s_barrier60; GFX10-WGP-NEXT: s_endpgm61;62; GFX10-CU-LABEL: test_s_barrier_workgroup_fence:63; GFX10-CU: ; %bb.0: ; %entry64; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)65; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x066; GFX10-CU-NEXT: s_barrier67; GFX10-CU-NEXT: s_endpgm68;69; GFX11-WGP-LABEL: test_s_barrier_workgroup_fence:70; GFX11-WGP: ; %bb.0: ; %entry71; GFX11-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)72; GFX11-WGP-NEXT: s_waitcnt_vscnt null, 0x073; GFX11-WGP-NEXT: s_barrier74; GFX11-WGP-NEXT: s_endpgm75;76; GFX11-CU-LABEL: test_s_barrier_workgroup_fence:77; GFX11-CU: ; %bb.0: ; %entry78; GFX11-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)79; GFX11-CU-NEXT: s_waitcnt_vscnt null, 0x080; GFX11-CU-NEXT: s_barrier81; GFX11-CU-NEXT: s_endpgm82;83; GFX12-WGP-LABEL: test_s_barrier_workgroup_fence:84; GFX12-WGP: ; %bb.0: ; %entry85; GFX12-WGP-NEXT: s_wait_bvhcnt 0x086; GFX12-WGP-NEXT: s_wait_samplecnt 0x087; GFX12-WGP-NEXT: s_wait_storecnt 0x088; GFX12-WGP-NEXT: s_wait_loadcnt_dscnt 0x089; GFX12-WGP-NEXT: s_barrier_signal -190; GFX12-WGP-NEXT: s_barrier_wait -191; GFX12-WGP-NEXT: s_endpgm92;93; GFX12-CU-LABEL: test_s_barrier_workgroup_fence:94; GFX12-CU: ; %bb.0: ; %entry95; GFX12-CU-NEXT: s_wait_bvhcnt 0x096; GFX12-CU-NEXT: s_wait_samplecnt 0x097; GFX12-CU-NEXT: s_wait_storecnt 0x098; GFX12-CU-NEXT: s_wait_loadcnt_dscnt 0x099; GFX12-CU-NEXT: s_barrier_signal -1100; GFX12-CU-NEXT: s_barrier_wait -1101; GFX12-CU-NEXT: s_endpgm102;103; GFX1250-LABEL: test_s_barrier_workgroup_fence:104; GFX1250: ; %bb.0: ; %entry105; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1106; GFX1250-NEXT: s_wait_storecnt 0x0107; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0108; GFX1250-NEXT: s_barrier_signal -1109; GFX1250-NEXT: s_barrier_wait -1110; GFX1250-NEXT: s_endpgm111entry:112 fence syncscope("workgroup") release113 call void @llvm.amdgcn.s.barrier()114 ret void115}116 117define amdgpu_kernel void @test_s_barrier_agent_fence() {118; GFX10-WGP-LABEL: test_s_barrier_agent_fence:119; GFX10-WGP: ; %bb.0: ; %entry120; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)121; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0122; GFX10-WGP-NEXT: s_barrier123; GFX10-WGP-NEXT: s_endpgm124;125; GFX10-CU-LABEL: test_s_barrier_agent_fence:126; GFX10-CU: ; %bb.0: ; %entry127; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)128; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0129; GFX10-CU-NEXT: s_barrier130; GFX10-CU-NEXT: s_endpgm131;132; GFX11-WGP-LABEL: test_s_barrier_agent_fence:133; GFX11-WGP: ; %bb.0: ; %entry134; GFX11-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)135; GFX11-WGP-NEXT: s_waitcnt_vscnt null, 0x0136; GFX11-WGP-NEXT: s_barrier137; GFX11-WGP-NEXT: s_endpgm138;139; GFX11-CU-LABEL: test_s_barrier_agent_fence:140; GFX11-CU: ; %bb.0: ; %entry141; GFX11-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)142; GFX11-CU-NEXT: s_waitcnt_vscnt null, 0x0143; GFX11-CU-NEXT: s_barrier144; GFX11-CU-NEXT: s_endpgm145;146; GFX12-WGP-LABEL: test_s_barrier_agent_fence:147; GFX12-WGP: ; %bb.0: ; %entry148; GFX12-WGP-NEXT: s_wait_bvhcnt 0x0149; GFX12-WGP-NEXT: s_wait_samplecnt 0x0150; GFX12-WGP-NEXT: s_wait_storecnt 0x0151; GFX12-WGP-NEXT: s_wait_loadcnt_dscnt 0x0152; GFX12-WGP-NEXT: s_barrier_signal -1153; GFX12-WGP-NEXT: s_barrier_wait -1154; GFX12-WGP-NEXT: s_endpgm155;156; GFX12-CU-LABEL: test_s_barrier_agent_fence:157; GFX12-CU: ; %bb.0: ; %entry158; GFX12-CU-NEXT: s_wait_bvhcnt 0x0159; GFX12-CU-NEXT: s_wait_samplecnt 0x0160; GFX12-CU-NEXT: s_wait_storecnt 0x0161; GFX12-CU-NEXT: s_wait_loadcnt_dscnt 0x0162; GFX12-CU-NEXT: s_barrier_signal -1163; GFX12-CU-NEXT: s_barrier_wait -1164; GFX12-CU-NEXT: s_endpgm165;166; GFX1250-LABEL: test_s_barrier_agent_fence:167; GFX1250: ; %bb.0: ; %entry168; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1169; GFX1250-NEXT: global_wb scope:SCOPE_DEV170; GFX1250-NEXT: s_wait_storecnt 0x0171; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0172; GFX1250-NEXT: s_barrier_signal -1173; GFX1250-NEXT: s_barrier_wait -1174; GFX1250-NEXT: s_endpgm175entry:176 fence syncscope("agent") release177 call void @llvm.amdgcn.s.barrier()178 ret void179}180