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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lasx %s -o - | FileCheck %s3; RUN: llc --mtriple=loongarch64 --mattr=+lasx %s -o - | FileCheck %s4 5;; xxvshuf4i.b6define <32 x i8> @shufflevector_xvshuf4i_v32i8(<32 x i8> %a, <32 x i8> %b) {7; CHECK-LABEL: shufflevector_xvshuf4i_v32i8:8; CHECK: # %bb.0:9; CHECK-NEXT: xvshuf4i.b $xr0, $xr0, 2710; CHECK-NEXT: ret11 %c = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 11, i32 10, i32 9, i32 8, i32 15, i32 14, i32 13, i32 12,12 i32 19, i32 18, i32 17, i32 16, i32 23, i32 22, i32 21, i32 20, i32 27, i32 26, i32 25, i32 24, i32 31, i32 30, i32 29, i32 28>13 ret <32 x i8> %c14}15 16;; xvshuf4i.h17define <16 x i16> @shufflevector_xvshuf4i_v16i16(<16 x i16> %a, <16 x i16> %b) {18; CHECK-LABEL: shufflevector_xvshuf4i_v16i16:19; CHECK: # %bb.0:20; CHECK-NEXT: xvshuf4i.h $xr0, $xr0, 2721; CHECK-NEXT: ret22 %c = shufflevector <16 x i16> %a, <16 x i16> %b, <16 x i32> <i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 11, i32 10, i32 9, i32 8, i32 15, i32 14, i32 13, i32 12>23 ret <16 x i16> %c24}25 26;; xvshuf4i.w27define <8 x i32> @shufflevector_xvshuf4i_v8i32(<8 x i32> %a, <8 x i32> %b) {28; CHECK-LABEL: shufflevector_xvshuf4i_v8i32:29; CHECK: # %bb.0:30; CHECK-NEXT: xvshuf4i.w $xr0, $xr0, 2731; CHECK-NEXT: ret32 %c = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4>33 ret <8 x i32> %c34}35 36;; xvshuf4i.d37define <4 x i64> @shufflevector_xvshuf4i_v4i64(<4 x i64> %a, <4 x i64> %b) {38; CHECK-LABEL: shufflevector_xvshuf4i_v4i64:39; CHECK: # %bb.0:40; CHECK-NEXT: xvbsrl.v $xr0, $xr0, 841; CHECK-NEXT: xvbsll.v $xr1, $xr1, 842; CHECK-NEXT: xvor.v $xr0, $xr1, $xr043; CHECK-NEXT: ret44 %c = shufflevector <4 x i64> %a, <4 x i64> %b, <4 x i32> <i32 1, i32 4, i32 3, i32 6>45 ret <4 x i64> %c46}47 48;; xvshuf4i.w49define <8 x float> @shufflevector_xvshuf4i_v8f32(<8 x float> %a, <8 x float> %b) {50; CHECK-LABEL: shufflevector_xvshuf4i_v8f32:51; CHECK: # %bb.0:52; CHECK-NEXT: xvshuf4i.w $xr0, $xr0, 2753; CHECK-NEXT: ret54 %c = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4>55 ret <8 x float> %c56}57 58;; xvshuf4i.d59define <4 x double> @shufflevector_xvshuf4i_v4f64(<4 x double> %a, <4 x double> %b) {60; CHECK-LABEL: shufflevector_xvshuf4i_v4f64:61; CHECK: # %bb.0:62; CHECK-NEXT: pcalau12i $a0, %pc_hi20(.LCPI5_0)63; CHECK-NEXT: xvld $xr2, $a0, %pc_lo12(.LCPI5_0)64; CHECK-NEXT: xvshuf.d $xr2, $xr1, $xr065; CHECK-NEXT: xvori.b $xr0, $xr2, 066; CHECK-NEXT: ret67 %c = shufflevector <4 x double> %a, <4 x double> %b, <4 x i32> <i32 4, i32 1, i32 6, i32 3>68 ret <4 x double> %c69}70