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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 42; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+v \3; RUN: -mattr=+zvfh -mattr=+zvfbfmin -mattr=+xsfmmbase \4; RUN: -mattr=+xsfmm32a -mattr=+xsfmm32a8f -mattr=+xsfmm32a4i -mattr=+xsfmm64a64f \5; RUN: -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK6; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+v \7; RUN: -mattr=+zvfh -mattr=+zvfbfmin -mattr=+xsfmmbase \8; RUN: -mattr=+zvfbfmin -mattr=+xsfmmbase \9; RUN: -mattr=+xsfmm32a -mattr=+xsfmm32a8f -mattr=+xsfmm32a4i -mattr=+xsfmm64a64f \10; RUN: -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK11 12define void @test_sf_vtmv_t_v_bf16m8(iXLen %tss, <vscale x 32 x bfloat> %src, iXLen %vl) {13; CHECK-LABEL: test_sf_vtmv_t_v_bf16m8:14; CHECK: # %bb.0: # %entry15; CHECK-NEXT: sf.vsettnt zero, a1, e16, w116; CHECK-NEXT: sf.vtmv.t.v a0, v817; CHECK-NEXT: ret18 entry:19 call void @llvm.riscv.sf.vtmv.t.v.nxv32bf16.iXLen(iXLen %tss, <vscale x 32 x bfloat> %src, iXLen %vl)20 ret void21}22 23define void @test_sf_vtmv_t_v_f16(iXLen %tss, <vscale x 32 x half> %src, iXLen %vl) {24; CHECK-LABEL: test_sf_vtmv_t_v_f16:25; CHECK: # %bb.0: # %entry26; CHECK-NEXT: sf.vsettnt zero, a1, e16, w127; CHECK-NEXT: sf.vtmv.t.v a0, v828; CHECK-NEXT: ret29 entry:30 call void @llvm.riscv.sf.vtmv.t.v.nxv32f16.iXLen(iXLen %tss, <vscale x 32 x half> %src, iXLen %vl)31 ret void32}33 34define void @test_sf_vtmv_t_v_f32(iXLen %tss, <vscale x 16 x float> %src, iXLen %vl) {35; CHECK-LABEL: test_sf_vtmv_t_v_f32:36; CHECK: # %bb.0: # %entry37; CHECK-NEXT: sf.vsettnt zero, a1, e32, w138; CHECK-NEXT: sf.vtmv.t.v a0, v839; CHECK-NEXT: ret40 entry:41 call void @llvm.riscv.sf.vtmv.t.v.nxv16f32.iXLen(iXLen %tss, <vscale x 16 x float> %src, iXLen %vl)42 ret void43}44 45define void @test_sf_vtmv_t_v_f64(iXLen %tss, <vscale x 8 x double> %src, iXLen %vl) {46; CHECK-LABEL: test_sf_vtmv_t_v_f64:47; CHECK: # %bb.0: # %entry48; CHECK-NEXT: sf.vsettnt zero, a1, e64, w149; CHECK-NEXT: sf.vtmv.t.v a0, v850; CHECK-NEXT: ret51 entry:52 call void @llvm.riscv.sf.vtmv.t.v.nxv8f64.iXLen(iXLen %tss, <vscale x 8 x double> %src, iXLen %vl)53 ret void54}55 56define void @test_sf_vtmv_t_v_i8(iXLen %tss, <vscale x 64 x i8> %src, iXLen %vl) {57; CHECK-LABEL: test_sf_vtmv_t_v_i8:58; CHECK: # %bb.0: # %entry59; CHECK-NEXT: sf.vsettnt zero, a1, e8, w160; CHECK-NEXT: sf.vtmv.t.v a0, v861; CHECK-NEXT: ret62 entry:63 call void @llvm.riscv.sf.vtmv.t.v.nxv64i8.iXLen(iXLen %tss, <vscale x 64 x i8> %src, iXLen %vl)64 ret void65}66 67define void @test_sf_vtmv_t_v_i16(iXLen %tss, <vscale x 32 x i16> %src, iXLen %vl) {68; CHECK-LABEL: test_sf_vtmv_t_v_i16:69; CHECK: # %bb.0: # %entry70; CHECK-NEXT: sf.vsettnt zero, a1, e16, w171; CHECK-NEXT: sf.vtmv.t.v a0, v872; CHECK-NEXT: ret73 entry:74 call void @llvm.riscv.sf.vtmv.t.v.nxv32i16.iXLen(iXLen %tss, <vscale x 32 x i16> %src, iXLen %vl)75 ret void76}77 78define void @test_sf_vtmv_t_v_i32(iXLen %tss, <vscale x 16 x i32> %src, iXLen %vl) {79; CHECK-LABEL: test_sf_vtmv_t_v_i32:80; CHECK: # %bb.0: # %entry81; CHECK-NEXT: sf.vsettnt zero, a1, e32, w182; CHECK-NEXT: sf.vtmv.t.v a0, v883; CHECK-NEXT: ret84 entry:85 call void @llvm.riscv.sf.vtmv.t.v.nxv16i32.iXLen(iXLen %tss, <vscale x 16 x i32> %src, iXLen %vl)86 ret void87}88 89define void @test_sf_vtmv_t_v_i64(iXLen %tss, <vscale x 8 x i64> %src, iXLen %vl) {90; CHECK-LABEL: test_sf_vtmv_t_v_i64:91; CHECK: # %bb.0: # %entry92; CHECK-NEXT: sf.vsettnt zero, a1, e64, w193; CHECK-NEXT: sf.vtmv.t.v a0, v894; CHECK-NEXT: ret95 entry:96 call void @llvm.riscv.sf.vtmv.t.v.nxv8i64.iXLen(iXLen %tss, <vscale x 8 x i64> %src, iXLen %vl)97 ret void98}99