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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -passes=loop-vectorize -S -prefer-predicate-over-epilogue=scalar-epilogue < %s | FileCheck %s3; RUN: opt -passes=loop-vectorize -S -force-vector-interleave=2 -prefer-predicate-over-epilogue=scalar-epilogue < %s | FileCheck --check-prefix=IC2 %s4 5target triple = "aarch64-unknown-linux-gnu"6 7; Test cases for PR60831.8 9define void @test_invar_gep(ptr %dst) #0 {10; CHECK-LABEL: @test_invar_gep(11; CHECK-NEXT: entry:12; CHECK-NEXT: br label [[VECTOR_PH:%.*]]13; CHECK: vector.ph:14; CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.vscale.i64()15; CHECK-NEXT: [[TMP3:%.*]] = mul nuw i64 [[TMP2]], 416; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 100, [[TMP3]]17; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 100, [[N_MOD_VF]]18; CHECK-NEXT: [[TMP5:%.*]] = call <vscale x 4 x i64> @llvm.stepvector.nxv4i64()19; CHECK-NEXT: [[TMP4:%.*]] = mul nsw <vscale x 4 x i64> [[TMP5]], splat (i64 1)20; CHECK-NEXT: [[INDUCTION:%.*]] = add nsw <vscale x 4 x i64> zeroinitializer, [[TMP4]]21; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 4 x i64> poison, i64 [[TMP3]], i64 022; CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 4 x i64> [[DOTSPLATINSERT]], <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer23; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]24; CHECK: vector.body:25; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]26; CHECK-NEXT: [[TMP9:%.*]] = phi <vscale x 4 x i64> [ [[INDUCTION]], [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[VECTOR_BODY]] ]27; CHECK-NEXT: [[TMP15:%.*]] = call i32 @llvm.vscale.i32()28; CHECK-NEXT: [[TMP16:%.*]] = mul nuw i32 [[TMP15]], 429; CHECK-NEXT: [[TMP17:%.*]] = sub i32 [[TMP16]], 130; CHECK-NEXT: [[TMP18:%.*]] = extractelement <vscale x 4 x i64> [[TMP9]], i32 [[TMP17]]31; CHECK-NEXT: store i64 [[TMP18]], ptr [[TMP14:%.*]], align 132; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP3]]33; CHECK-NEXT: [[VEC_IND_NEXT]] = add nsw <vscale x 4 x i64> [[TMP9]], [[DOTSPLAT]]34; CHECK-NEXT: [[TMP19:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]35; CHECK-NEXT: br i1 [[TMP19]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]36; CHECK: middle.block:37; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 100, [[N_VEC]]38; CHECK-NEXT: br i1 [[CMP_N]], label [[EXIT:%.*]], label [[SCALAR_PH:%.*]]39; CHECK: scalar.ph:40; CHECK-NEXT: br label [[LOOP:%.*]]41; CHECK: loop:42; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[N_VEC]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]43; CHECK-NEXT: [[GEP_INVAR:%.*]] = getelementptr i8, ptr [[TMP14]], i64 044; CHECK-NEXT: store i64 [[IV]], ptr [[GEP_INVAR]], align 145; CHECK-NEXT: [[IV_NEXT]] = add nsw i64 [[IV]], 146; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], 10047; CHECK-NEXT: br i1 [[EC]], label [[EXIT]], label [[LOOP]], !llvm.loop [[LOOP4:![0-9]+]]48; CHECK: exit:49; CHECK-NEXT: ret void50;51; IC2-LABEL: @test_invar_gep(52; IC2-NEXT: entry:53; IC2-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64()54; IC2-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 355; IC2-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 100, [[TMP1]]56; IC2-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]57; IC2: vector.ph:58; IC2-NEXT: [[TMP2:%.*]] = call i64 @llvm.vscale.i64()59; IC2-NEXT: [[TMP11:%.*]] = mul nuw i64 [[TMP2]], 460; IC2-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <vscale x 4 x i64> poison, i64 [[TMP11]], i64 061; IC2-NEXT: [[TMP21:%.*]] = shufflevector <vscale x 4 x i64> [[BROADCAST_SPLATINSERT]], <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer62; IC2-NEXT: [[TMP3:%.*]] = mul i64 [[TMP11]], 263; IC2-NEXT: [[N_MOD_VF:%.*]] = urem i64 100, [[TMP3]]64; IC2-NEXT: [[N_VEC:%.*]] = sub i64 100, [[N_MOD_VF]]65; IC2-NEXT: [[TMP5:%.*]] = call <vscale x 4 x i64> @llvm.stepvector.nxv4i64()66; IC2-NEXT: [[TMP12:%.*]] = mul nsw <vscale x 4 x i64> [[TMP5]], splat (i64 1)67; IC2-NEXT: [[INDUCTION:%.*]] = add nsw <vscale x 4 x i64> zeroinitializer, [[TMP12]]68; IC2-NEXT: br label [[VECTOR_BODY:%.*]]69; IC2: vector.body:70; IC2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]71; IC2-NEXT: [[DOTSPLAT:%.*]] = phi <vscale x 4 x i64> [ [[INDUCTION]], [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[VECTOR_BODY]] ]72; IC2-NEXT: [[TMP22:%.*]] = add <vscale x 4 x i64> [[DOTSPLAT]], [[TMP21]]73; IC2-NEXT: [[TMP6:%.*]] = call i32 @llvm.vscale.i32()74; IC2-NEXT: [[TMP7:%.*]] = mul nuw i32 [[TMP6]], 475; IC2-NEXT: [[TMP8:%.*]] = sub i32 [[TMP7]], 176; IC2-NEXT: [[TMP9:%.*]] = extractelement <vscale x 4 x i64> [[TMP22]], i32 [[TMP8]]77; IC2-NEXT: store i64 [[TMP9]], ptr [[DST:%.*]], align 178; IC2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP3]]79; IC2-NEXT: [[VEC_IND_NEXT]] = add nsw <vscale x 4 x i64> [[TMP22]], [[TMP21]]80; IC2-NEXT: [[TMP10:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]81; IC2-NEXT: br i1 [[TMP10]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]82; IC2: middle.block:83; IC2-NEXT: [[CMP_N:%.*]] = icmp eq i64 100, [[N_VEC]]84; IC2-NEXT: br i1 [[CMP_N]], label [[EXIT:%.*]], label [[SCALAR_PH]]85; IC2: scalar.ph:86; IC2-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ]87; IC2-NEXT: br label [[LOOP:%.*]]88; IC2: loop:89; IC2-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]90; IC2-NEXT: [[GEP_INVAR:%.*]] = getelementptr i8, ptr [[DST]], i64 091; IC2-NEXT: store i64 [[IV]], ptr [[GEP_INVAR]], align 192; IC2-NEXT: [[IV_NEXT]] = add nsw i64 [[IV]], 193; IC2-NEXT: [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], 10094; IC2-NEXT: br i1 [[EC]], label [[EXIT]], label [[LOOP]], !llvm.loop [[LOOP4:![0-9]+]]95; IC2: exit:96; IC2-NEXT: ret void97;98entry:99 br label %loop100 101loop:102 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]103 %gep.invar = getelementptr i8, ptr %dst, i64 0104 store i64 %iv, ptr %gep.invar, align 1105 %iv.next = add nsw i64 %iv, 1106 %ec = icmp eq i64 %iv.next, 100107 br i1 %ec, label %exit, label %loop, !llvm.loop !0108 109exit:110 ret void111}112 113define void @test_invar_gep_var_start(i64 %start, ptr %dst) #0 {114; CHECK-LABEL: @test_invar_gep_var_start(115; CHECK-NEXT: entry:116; CHECK-NEXT: [[TMP0:%.*]] = sub i64 100, [[START:%.*]]117; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.vscale.i64()118; CHECK-NEXT: [[TMP2:%.*]] = shl nuw nsw i64 [[TMP1]], 2119; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP0]], [[TMP2]]120; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]121; CHECK: vector.ph:122; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.vscale.i64()123; CHECK-NEXT: [[TMP4:%.*]] = mul nuw i64 [[TMP3]], 4124; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TMP0]], [[TMP4]]125; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP0]], [[N_MOD_VF]]126; CHECK-NEXT: [[TMP5:%.*]] = add i64 [[START]], [[N_VEC]]127; CHECK-NEXT: [[TMP6:%.*]] = call <vscale x 4 x i64> @llvm.stepvector.nxv4i64()128; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 4 x i64> poison, i64 [[START]], i64 0129; CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 4 x i64> [[DOTSPLATINSERT]], <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer130; CHECK-NEXT: [[TMP13:%.*]] = mul nsw <vscale x 4 x i64> [[TMP6]], splat (i64 1)131; CHECK-NEXT: [[INDUCTION:%.*]] = add nsw <vscale x 4 x i64> [[DOTSPLAT]], [[TMP13]]132; CHECK-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <vscale x 4 x i64> poison, i64 [[TMP4]], i64 0133; CHECK-NEXT: [[BROADCAST_SPLAT2:%.*]] = shufflevector <vscale x 4 x i64> [[BROADCAST_SPLATINSERT1]], <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer134; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]135; CHECK: vector.body:136; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]137; CHECK-NEXT: [[TMP7:%.*]] = phi <vscale x 4 x i64> [ [[INDUCTION]], [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[VECTOR_BODY]] ]138; CHECK-NEXT: [[TMP8:%.*]] = call i32 @llvm.vscale.i32()139; CHECK-NEXT: [[TMP9:%.*]] = mul nuw i32 [[TMP8]], 4140; CHECK-NEXT: [[TMP10:%.*]] = sub i32 [[TMP9]], 1141; CHECK-NEXT: [[TMP11:%.*]] = extractelement <vscale x 4 x i64> [[TMP7]], i32 [[TMP10]]142; CHECK-NEXT: store i64 [[TMP11]], ptr [[DST:%.*]], align 1143; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP4]]144; CHECK-NEXT: [[VEC_IND_NEXT]] = add nsw <vscale x 4 x i64> [[TMP7]], [[BROADCAST_SPLAT2]]145; CHECK-NEXT: [[TMP12:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]146; CHECK-NEXT: br i1 [[TMP12]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]]147; CHECK: middle.block:148; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP0]], [[N_VEC]]149; CHECK-NEXT: br i1 [[CMP_N]], label [[EXIT:%.*]], label [[SCALAR_PH]]150; CHECK: scalar.ph:151; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[TMP5]], [[MIDDLE_BLOCK]] ], [ [[START]], [[ENTRY:%.*]] ]152; CHECK-NEXT: br label [[LOOP:%.*]]153; CHECK: loop:154; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]155; CHECK-NEXT: [[GEP_INVAR:%.*]] = getelementptr i8, ptr [[DST]], i64 0156; CHECK-NEXT: store i64 [[IV]], ptr [[GEP_INVAR]], align 1157; CHECK-NEXT: [[IV_NEXT]] = add nsw i64 [[IV]], 1158; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], 100159; CHECK-NEXT: br i1 [[EC]], label [[EXIT]], label [[LOOP]], !llvm.loop [[LOOP6:![0-9]+]]160; CHECK: exit:161; CHECK-NEXT: ret void162;163; IC2-LABEL: @test_invar_gep_var_start(164; IC2-NEXT: entry:165; IC2-NEXT: [[TMP0:%.*]] = sub i64 100, [[START:%.*]]166; IC2-NEXT: [[TMP1:%.*]] = call i64 @llvm.vscale.i64()167; IC2-NEXT: [[TMP2:%.*]] = shl nuw nsw i64 [[TMP1]], 3168; IC2-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP0]], [[TMP2]]169; IC2-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]170; IC2: vector.ph:171; IC2-NEXT: [[TMP3:%.*]] = call i64 @llvm.vscale.i64()172; IC2-NEXT: [[TMP4:%.*]] = mul nuw i64 [[TMP3]], 4173; IC2-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <vscale x 4 x i64> poison, i64 [[TMP4]], i64 0174; IC2-NEXT: [[TMP9:%.*]] = shufflevector <vscale x 4 x i64> [[BROADCAST_SPLATINSERT]], <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer175; IC2-NEXT: [[TMP5:%.*]] = mul i64 [[TMP4]], 2176; IC2-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TMP0]], [[TMP5]]177; IC2-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP0]], [[N_MOD_VF]]178; IC2-NEXT: [[TMP6:%.*]] = add i64 [[START]], [[N_VEC]]179; IC2-NEXT: [[BROADCAST_SPLAT:%.*]] = call <vscale x 4 x i64> @llvm.stepvector.nxv4i64()180; IC2-NEXT: [[DOTSPLATINSERT1:%.*]] = insertelement <vscale x 4 x i64> poison, i64 [[START]], i64 0181; IC2-NEXT: [[VEC_IND:%.*]] = shufflevector <vscale x 4 x i64> [[DOTSPLATINSERT1]], <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer182; IC2-NEXT: [[TMP8:%.*]] = mul nsw <vscale x 4 x i64> [[BROADCAST_SPLAT]], splat (i64 1)183; IC2-NEXT: [[INDUCTION:%.*]] = add nsw <vscale x 4 x i64> [[VEC_IND]], [[TMP8]]184; IC2-NEXT: br label [[VECTOR_BODY:%.*]]185; IC2: vector.body:186; IC2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]187; IC2-NEXT: [[DOTSPLAT:%.*]] = phi <vscale x 4 x i64> [ [[INDUCTION]], [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[VECTOR_BODY]] ]188; IC2-NEXT: [[TMP10:%.*]] = add <vscale x 4 x i64> [[DOTSPLAT]], [[TMP9]]189; IC2-NEXT: [[TMP12:%.*]] = call i32 @llvm.vscale.i32()190; IC2-NEXT: [[TMP13:%.*]] = mul nuw i32 [[TMP12]], 4191; IC2-NEXT: [[TMP14:%.*]] = sub i32 [[TMP13]], 1192; IC2-NEXT: [[TMP15:%.*]] = extractelement <vscale x 4 x i64> [[TMP10]], i32 [[TMP14]]193; IC2-NEXT: store i64 [[TMP15]], ptr [[DST:%.*]], align 1194; IC2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP5]]195; IC2-NEXT: [[VEC_IND_NEXT]] = add nsw <vscale x 4 x i64> [[TMP10]], [[TMP9]]196; IC2-NEXT: [[TMP16:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]197; IC2-NEXT: br i1 [[TMP16]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]]198; IC2: middle.block:199; IC2-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP0]], [[N_VEC]]200; IC2-NEXT: br i1 [[CMP_N]], label [[EXIT:%.*]], label [[SCALAR_PH]]201; IC2: scalar.ph:202; IC2-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[TMP6]], [[MIDDLE_BLOCK]] ], [ [[START]], [[ENTRY:%.*]] ]203; IC2-NEXT: br label [[LOOP:%.*]]204; IC2: loop:205; IC2-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]206; IC2-NEXT: [[GEP_INVAR:%.*]] = getelementptr i8, ptr [[DST]], i64 0207; IC2-NEXT: store i64 [[IV]], ptr [[GEP_INVAR]], align 1208; IC2-NEXT: [[IV_NEXT]] = add nsw i64 [[IV]], 1209; IC2-NEXT: [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], 100210; IC2-NEXT: br i1 [[EC]], label [[EXIT]], label [[LOOP]], !llvm.loop [[LOOP6:![0-9]+]]211; IC2: exit:212; IC2-NEXT: ret void213;214entry:215 br label %loop216 217loop:218 %iv = phi i64 [ %start, %entry ], [ %iv.next, %loop ]219 %gep.invar = getelementptr i8, ptr %dst, i64 0220 store i64 %iv, ptr %gep.invar, align 1221 %iv.next = add nsw i64 %iv, 1222 %ec = icmp eq i64 %iv.next, 100223 br i1 %ec, label %exit, label %loop, !llvm.loop !0224 225exit:226 ret void227}228 229define void @test_invar_gep_var_start_step_2(i64 %start, ptr %dst) #0 {230; CHECK-LABEL: @test_invar_gep_var_start_step_2(231; CHECK-NEXT: entry:232; CHECK-NEXT: [[TMP0:%.*]] = sub i64 98, [[START:%.*]]233; CHECK-NEXT: [[TMP1:%.*]] = lshr i64 [[TMP0]], 1234; CHECK-NEXT: [[TMP2:%.*]] = add nuw i64 [[TMP1]], 1235; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.vscale.i64()236; CHECK-NEXT: [[TMP4:%.*]] = shl nuw nsw i64 [[TMP3]], 2237; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP2]], [[TMP4]]238; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]239; CHECK: vector.ph:240; CHECK-NEXT: [[TMP5:%.*]] = call i64 @llvm.vscale.i64()241; CHECK-NEXT: [[TMP6:%.*]] = mul nuw i64 [[TMP5]], 4242; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TMP2]], [[TMP6]]243; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP2]], [[N_MOD_VF]]244; CHECK-NEXT: [[TMP9:%.*]] = mul i64 [[N_VEC]], 2245; CHECK-NEXT: [[OFFSET_IDX:%.*]] = add i64 [[START]], [[TMP9]]246; CHECK-NEXT: [[TMP10:%.*]] = call <vscale x 4 x i64> @llvm.stepvector.nxv4i64()247; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 4 x i64> poison, i64 [[START]], i64 0248; CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 4 x i64> [[DOTSPLATINSERT]], <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer249; CHECK-NEXT: [[TMP18:%.*]] = mul nsw <vscale x 4 x i64> [[TMP10]], splat (i64 2)250; CHECK-NEXT: [[INDUCTION:%.*]] = add nsw <vscale x 4 x i64> [[DOTSPLAT]], [[TMP18]]251; CHECK-NEXT: [[TMP11:%.*]] = mul nsw i64 2, [[TMP6]]252; CHECK-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <vscale x 4 x i64> poison, i64 [[TMP11]], i64 0253; CHECK-NEXT: [[BROADCAST_SPLAT2:%.*]] = shufflevector <vscale x 4 x i64> [[BROADCAST_SPLATINSERT1]], <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer254; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]255; CHECK: vector.body:256; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]257; CHECK-NEXT: [[TMP12:%.*]] = phi <vscale x 4 x i64> [ [[INDUCTION]], [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[VECTOR_BODY]] ]258; CHECK-NEXT: [[TMP13:%.*]] = call i32 @llvm.vscale.i32()259; CHECK-NEXT: [[TMP14:%.*]] = mul nuw i32 [[TMP13]], 4260; CHECK-NEXT: [[TMP15:%.*]] = sub i32 [[TMP14]], 1261; CHECK-NEXT: [[TMP16:%.*]] = extractelement <vscale x 4 x i64> [[TMP12]], i32 [[TMP15]]262; CHECK-NEXT: store i64 [[TMP16]], ptr [[DST:%.*]], align 1263; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP6]]264; CHECK-NEXT: [[VEC_IND_NEXT]] = add nsw <vscale x 4 x i64> [[TMP12]], [[BROADCAST_SPLAT2]]265; CHECK-NEXT: [[TMP17:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]266; CHECK-NEXT: br i1 [[TMP17]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP7:![0-9]+]]267; CHECK: middle.block:268; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP2]], [[N_VEC]]269; CHECK-NEXT: br i1 [[CMP_N]], label [[EXIT:%.*]], label [[SCALAR_PH]]270; CHECK: scalar.ph:271; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[OFFSET_IDX]], [[MIDDLE_BLOCK]] ], [ [[START]], [[ENTRY:%.*]] ]272; CHECK-NEXT: br label [[LOOP:%.*]]273; CHECK: loop:274; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]275; CHECK-NEXT: [[GEP_INVAR:%.*]] = getelementptr i8, ptr [[DST]], i64 0276; CHECK-NEXT: store i64 [[IV]], ptr [[GEP_INVAR]], align 1277; CHECK-NEXT: [[IV_NEXT]] = add nsw i64 [[IV]], 2278; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], 100279; CHECK-NEXT: br i1 [[EC]], label [[EXIT]], label [[LOOP]], !llvm.loop [[LOOP8:![0-9]+]]280; CHECK: exit:281; CHECK-NEXT: ret void282;283; IC2-LABEL: @test_invar_gep_var_start_step_2(284; IC2-NEXT: entry:285; IC2-NEXT: [[TMP0:%.*]] = sub i64 98, [[START:%.*]]286; IC2-NEXT: [[TMP1:%.*]] = lshr i64 [[TMP0]], 1287; IC2-NEXT: [[TMP2:%.*]] = add nuw i64 [[TMP1]], 1288; IC2-NEXT: [[TMP3:%.*]] = call i64 @llvm.vscale.i64()289; IC2-NEXT: [[TMP4:%.*]] = shl nuw nsw i64 [[TMP3]], 3290; IC2-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP2]], [[TMP4]]291; IC2-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]292; IC2: vector.ph:293; IC2-NEXT: [[TMP5:%.*]] = call i64 @llvm.vscale.i64()294; IC2-NEXT: [[TMP6:%.*]] = mul nuw i64 [[TMP5]], 4295; IC2-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <vscale x 4 x i64> poison, i64 [[TMP6]], i64 0296; IC2-NEXT: [[BROADCAST_SPLAT1:%.*]] = shufflevector <vscale x 4 x i64> [[BROADCAST_SPLATINSERT]], <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer297; IC2-NEXT: [[TMP7:%.*]] = mul i64 [[TMP6]], 2298; IC2-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TMP2]], [[TMP7]]299; IC2-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP2]], [[N_MOD_VF]]300; IC2-NEXT: [[TMP10:%.*]] = mul i64 [[N_VEC]], 2301; IC2-NEXT: [[OFFSET_IDX:%.*]] = add i64 [[START]], [[TMP10]]302; IC2-NEXT: [[TMP13:%.*]] = mul <vscale x 4 x i64> [[BROADCAST_SPLAT1]], splat (i64 2)303; IC2-NEXT: [[TMP11:%.*]] = call <vscale x 4 x i64> @llvm.stepvector.nxv4i64()304; IC2-NEXT: [[DOTSPLATINSERT1:%.*]] = insertelement <vscale x 4 x i64> poison, i64 [[START]], i64 0305; IC2-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <vscale x 4 x i64> [[DOTSPLATINSERT1]], <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer306; IC2-NEXT: [[TMP12:%.*]] = mul nsw <vscale x 4 x i64> [[TMP11]], splat (i64 2)307; IC2-NEXT: [[INDUCTION:%.*]] = add nsw <vscale x 4 x i64> [[BROADCAST_SPLAT]], [[TMP12]]308; IC2-NEXT: br label [[VECTOR_BODY:%.*]]309; IC2: vector.body:310; IC2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]311; IC2-NEXT: [[DOTSPLAT:%.*]] = phi <vscale x 4 x i64> [ [[INDUCTION]], [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[VECTOR_BODY]] ]312; IC2-NEXT: [[TMP14:%.*]] = add <vscale x 4 x i64> [[DOTSPLAT]], [[TMP13]]313; IC2-NEXT: [[TMP17:%.*]] = call i32 @llvm.vscale.i32()314; IC2-NEXT: [[TMP18:%.*]] = mul nuw i32 [[TMP17]], 4315; IC2-NEXT: [[TMP19:%.*]] = sub i32 [[TMP18]], 1316; IC2-NEXT: [[TMP20:%.*]] = extractelement <vscale x 4 x i64> [[TMP14]], i32 [[TMP19]]317; IC2-NEXT: store i64 [[TMP20]], ptr [[DST:%.*]], align 1318; IC2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP7]]319; IC2-NEXT: [[VEC_IND_NEXT]] = add nsw <vscale x 4 x i64> [[TMP14]], [[TMP13]]320; IC2-NEXT: [[TMP21:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]321; IC2-NEXT: br i1 [[TMP21]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP7:![0-9]+]]322; IC2: middle.block:323; IC2-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP2]], [[N_VEC]]324; IC2-NEXT: br i1 [[CMP_N]], label [[EXIT:%.*]], label [[SCALAR_PH]]325; IC2: scalar.ph:326; IC2-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[OFFSET_IDX]], [[MIDDLE_BLOCK]] ], [ [[START]], [[ENTRY:%.*]] ]327; IC2-NEXT: br label [[LOOP:%.*]]328; IC2: loop:329; IC2-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]330; IC2-NEXT: [[GEP_INVAR:%.*]] = getelementptr i8, ptr [[DST]], i64 0331; IC2-NEXT: store i64 [[IV]], ptr [[GEP_INVAR]], align 1332; IC2-NEXT: [[IV_NEXT]] = add nsw i64 [[IV]], 2333; IC2-NEXT: [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], 100334; IC2-NEXT: br i1 [[EC]], label [[EXIT]], label [[LOOP]], !llvm.loop [[LOOP8:![0-9]+]]335; IC2: exit:336; IC2-NEXT: ret void337;338entry:339 br label %loop340 341loop:342 %iv = phi i64 [ %start, %entry ], [ %iv.next, %loop ]343 %gep.invar = getelementptr i8, ptr %dst, i64 0344 store i64 %iv, ptr %gep.invar, align 1345 %iv.next = add nsw i64 %iv, 2346 %ec = icmp eq i64 %iv.next, 100347 br i1 %ec, label %exit, label %loop, !llvm.loop !0348 349exit:350 ret void351}352 353define void @test_loop2(i64 %n, ptr %dst) {354; CHECK-LABEL: @test_loop2(355; CHECK-NEXT: iter.check:356; CHECK-NEXT: br i1 false, label [[VEC_EPILOG_SCALAR_PH:%.*]], label [[VECTOR_MAIN_LOOP_ITER_CHECK:%.*]]357; CHECK: vector.main.loop.iter.check:358; CHECK-NEXT: br i1 false, label [[VEC_EPILOG_PH:%.*]], label [[VECTOR_PH:%.*]]359; CHECK: vector.ph:360; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]361; CHECK: vector.body:362; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]363; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[INDEX]], 0364; CHECK-NEXT: [[TMP1:%.*]] = add i64 [[INDEX]], 1365; CHECK-NEXT: [[TMP2:%.*]] = add i64 [[INDEX]], 2366; CHECK-NEXT: [[TMP3:%.*]] = add i64 [[INDEX]], 3367; CHECK-NEXT: [[TMP4:%.*]] = add i64 [[INDEX]], 4368; CHECK-NEXT: [[TMP5:%.*]] = add i64 [[INDEX]], 5369; CHECK-NEXT: [[TMP6:%.*]] = add i64 [[INDEX]], 6370; CHECK-NEXT: [[TMP7:%.*]] = add i64 [[INDEX]], 7371; CHECK-NEXT: [[TMP8:%.*]] = add i64 [[INDEX]], 8372; CHECK-NEXT: [[TMP9:%.*]] = add i64 [[INDEX]], 9373; CHECK-NEXT: [[TMP10:%.*]] = add i64 [[INDEX]], 10374; CHECK-NEXT: [[TMP11:%.*]] = add i64 [[INDEX]], 11375; CHECK-NEXT: [[TMP12:%.*]] = add i64 [[INDEX]], 12376; CHECK-NEXT: [[TMP13:%.*]] = add i64 [[INDEX]], 13377; CHECK-NEXT: [[TMP14:%.*]] = add i64 [[INDEX]], 14378; CHECK-NEXT: [[TMP15:%.*]] = add i64 [[INDEX]], 15379; CHECK-NEXT: [[TMP16:%.*]] = sub nsw i64 [[N:%.*]], [[TMP0]]380; CHECK-NEXT: [[TMP17:%.*]] = sub nsw i64 [[N]], [[TMP1]]381; CHECK-NEXT: [[TMP18:%.*]] = sub nsw i64 [[N]], [[TMP2]]382; CHECK-NEXT: [[TMP19:%.*]] = sub nsw i64 [[N]], [[TMP3]]383; CHECK-NEXT: [[TMP20:%.*]] = sub nsw i64 [[N]], [[TMP4]]384; CHECK-NEXT: [[TMP21:%.*]] = sub nsw i64 [[N]], [[TMP5]]385; CHECK-NEXT: [[TMP22:%.*]] = sub nsw i64 [[N]], [[TMP6]]386; CHECK-NEXT: [[TMP23:%.*]] = sub nsw i64 [[N]], [[TMP7]]387; CHECK-NEXT: [[TMP24:%.*]] = sub nsw i64 [[N]], [[TMP8]]388; CHECK-NEXT: [[TMP25:%.*]] = sub nsw i64 [[N]], [[TMP9]]389; CHECK-NEXT: [[TMP26:%.*]] = sub nsw i64 [[N]], [[TMP10]]390; CHECK-NEXT: [[TMP27:%.*]] = sub nsw i64 [[N]], [[TMP11]]391; CHECK-NEXT: [[TMP28:%.*]] = sub nsw i64 [[N]], [[TMP12]]392; CHECK-NEXT: [[TMP29:%.*]] = sub nsw i64 [[N]], [[TMP13]]393; CHECK-NEXT: [[TMP30:%.*]] = sub nsw i64 [[N]], [[TMP14]]394; CHECK-NEXT: [[TMP31:%.*]] = sub nsw i64 [[N]], [[TMP15]]395; CHECK-NEXT: [[TMP32:%.*]] = insertelement <16 x i64> poison, i64 [[TMP16]], i32 0396; CHECK-NEXT: [[TMP33:%.*]] = insertelement <16 x i64> [[TMP32]], i64 [[TMP17]], i32 1397; CHECK-NEXT: [[TMP34:%.*]] = insertelement <16 x i64> [[TMP33]], i64 [[TMP18]], i32 2398; CHECK-NEXT: [[TMP35:%.*]] = insertelement <16 x i64> [[TMP34]], i64 [[TMP19]], i32 3399; CHECK-NEXT: [[TMP36:%.*]] = insertelement <16 x i64> [[TMP35]], i64 [[TMP20]], i32 4400; CHECK-NEXT: [[TMP37:%.*]] = insertelement <16 x i64> [[TMP36]], i64 [[TMP21]], i32 5401; CHECK-NEXT: [[TMP38:%.*]] = insertelement <16 x i64> [[TMP37]], i64 [[TMP22]], i32 6402; CHECK-NEXT: [[TMP39:%.*]] = insertelement <16 x i64> [[TMP38]], i64 [[TMP23]], i32 7403; CHECK-NEXT: [[TMP40:%.*]] = insertelement <16 x i64> [[TMP39]], i64 [[TMP24]], i32 8404; CHECK-NEXT: [[TMP41:%.*]] = insertelement <16 x i64> [[TMP40]], i64 [[TMP25]], i32 9405; CHECK-NEXT: [[TMP42:%.*]] = insertelement <16 x i64> [[TMP41]], i64 [[TMP26]], i32 10406; CHECK-NEXT: [[TMP43:%.*]] = insertelement <16 x i64> [[TMP42]], i64 [[TMP27]], i32 11407; CHECK-NEXT: [[TMP44:%.*]] = insertelement <16 x i64> [[TMP43]], i64 [[TMP28]], i32 12408; CHECK-NEXT: [[TMP45:%.*]] = insertelement <16 x i64> [[TMP44]], i64 [[TMP29]], i32 13409; CHECK-NEXT: [[TMP46:%.*]] = insertelement <16 x i64> [[TMP45]], i64 [[TMP30]], i32 14410; CHECK-NEXT: [[TMP47:%.*]] = insertelement <16 x i64> [[TMP46]], i64 [[TMP31]], i32 15411; CHECK-NEXT: [[TMP48:%.*]] = trunc <16 x i64> [[TMP47]] to <16 x i8>412; CHECK-NEXT: [[TMP49:%.*]] = add i64 [[TMP0]], [[TMP16]]413; CHECK-NEXT: [[TMP50:%.*]] = getelementptr i8, ptr [[DST:%.*]], i64 [[TMP49]]414; CHECK-NEXT: [[TMP51:%.*]] = extractelement <16 x i8> [[TMP48]], i32 15415; CHECK-NEXT: store i8 [[TMP51]], ptr [[TMP50]], align 1416; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 16417; CHECK-NEXT: [[TMP52:%.*]] = icmp eq i64 [[INDEX_NEXT]], 992418; CHECK-NEXT: br i1 [[TMP52]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP9:![0-9]+]]419; CHECK: middle.block:420; CHECK-NEXT: br i1 false, label [[EXIT:%.*]], label [[VEC_EPILOG_ITER_CHECK:%.*]]421; CHECK: vec.epilog.iter.check:422; CHECK-NEXT: br i1 false, label [[VEC_EPILOG_SCALAR_PH]], label [[VEC_EPILOG_PH]], !prof [[PROF10:![0-9]+]]423; CHECK: vec.epilog.ph:424; CHECK-NEXT: [[VEC_EPILOG_RESUME_VAL:%.*]] = phi i64 [ 992, [[VEC_EPILOG_ITER_CHECK]] ], [ 0, [[VECTOR_MAIN_LOOP_ITER_CHECK]] ]425; CHECK-NEXT: br label [[VEC_EPILOG_VECTOR_BODY:%.*]]426; CHECK: vec.epilog.vector.body:427; CHECK-NEXT: [[INDEX2:%.*]] = phi i64 [ [[VEC_EPILOG_RESUME_VAL]], [[VEC_EPILOG_PH]] ], [ [[INDEX_NEXT3:%.*]], [[VEC_EPILOG_VECTOR_BODY]] ]428; CHECK-NEXT: [[TMP53:%.*]] = add i64 [[INDEX2]], 0429; CHECK-NEXT: [[TMP54:%.*]] = add i64 [[INDEX2]], 1430; CHECK-NEXT: [[TMP55:%.*]] = add i64 [[INDEX2]], 2431; CHECK-NEXT: [[TMP56:%.*]] = add i64 [[INDEX2]], 3432; CHECK-NEXT: [[TMP57:%.*]] = add i64 [[INDEX2]], 4433; CHECK-NEXT: [[TMP58:%.*]] = add i64 [[INDEX2]], 5434; CHECK-NEXT: [[TMP59:%.*]] = add i64 [[INDEX2]], 6435; CHECK-NEXT: [[TMP60:%.*]] = add i64 [[INDEX2]], 7436; CHECK-NEXT: [[TMP61:%.*]] = sub nsw i64 [[N]], [[TMP53]]437; CHECK-NEXT: [[TMP62:%.*]] = sub nsw i64 [[N]], [[TMP54]]438; CHECK-NEXT: [[TMP63:%.*]] = sub nsw i64 [[N]], [[TMP55]]439; CHECK-NEXT: [[TMP64:%.*]] = sub nsw i64 [[N]], [[TMP56]]440; CHECK-NEXT: [[TMP65:%.*]] = sub nsw i64 [[N]], [[TMP57]]441; CHECK-NEXT: [[TMP66:%.*]] = sub nsw i64 [[N]], [[TMP58]]442; CHECK-NEXT: [[TMP67:%.*]] = sub nsw i64 [[N]], [[TMP59]]443; CHECK-NEXT: [[TMP68:%.*]] = sub nsw i64 [[N]], [[TMP60]]444; CHECK-NEXT: [[TMP69:%.*]] = insertelement <8 x i64> poison, i64 [[TMP61]], i32 0445; CHECK-NEXT: [[TMP70:%.*]] = insertelement <8 x i64> [[TMP69]], i64 [[TMP62]], i32 1446; CHECK-NEXT: [[TMP71:%.*]] = insertelement <8 x i64> [[TMP70]], i64 [[TMP63]], i32 2447; CHECK-NEXT: [[TMP72:%.*]] = insertelement <8 x i64> [[TMP71]], i64 [[TMP64]], i32 3448; CHECK-NEXT: [[TMP73:%.*]] = insertelement <8 x i64> [[TMP72]], i64 [[TMP65]], i32 4449; CHECK-NEXT: [[TMP74:%.*]] = insertelement <8 x i64> [[TMP73]], i64 [[TMP66]], i32 5450; CHECK-NEXT: [[TMP75:%.*]] = insertelement <8 x i64> [[TMP74]], i64 [[TMP67]], i32 6451; CHECK-NEXT: [[TMP76:%.*]] = insertelement <8 x i64> [[TMP75]], i64 [[TMP68]], i32 7452; CHECK-NEXT: [[TMP77:%.*]] = trunc <8 x i64> [[TMP76]] to <8 x i8>453; CHECK-NEXT: [[TMP78:%.*]] = add i64 [[TMP53]], [[TMP61]]454; CHECK-NEXT: [[TMP79:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP78]]455; CHECK-NEXT: [[TMP80:%.*]] = extractelement <8 x i8> [[TMP77]], i32 7456; CHECK-NEXT: store i8 [[TMP80]], ptr [[TMP79]], align 1457; CHECK-NEXT: [[INDEX_NEXT3]] = add nuw i64 [[INDEX2]], 8458; CHECK-NEXT: [[TMP81:%.*]] = icmp eq i64 [[INDEX_NEXT3]], 1000459; CHECK-NEXT: br i1 [[TMP81]], label [[VEC_EPILOG_MIDDLE_BLOCK:%.*]], label [[VEC_EPILOG_VECTOR_BODY]], !llvm.loop [[LOOP11:![0-9]+]]460; CHECK: vec.epilog.middle.block:461; CHECK-NEXT: br i1 false, label [[EXIT]], label [[VEC_EPILOG_SCALAR_PH]]462; CHECK: vec.epilog.scalar.ph:463; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 1000, [[VEC_EPILOG_MIDDLE_BLOCK]] ], [ 992, [[VEC_EPILOG_ITER_CHECK]] ], [ 0, [[ITER_CHECK:%.*]] ]464; CHECK-NEXT: br label [[LOOP:%.*]]465; CHECK: loop:466; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[VEC_EPILOG_SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]467; CHECK-NEXT: [[SUB_N:%.*]] = sub nsw i64 [[N]], [[IV]]468; CHECK-NEXT: [[SUB_N_TRUNC:%.*]] = trunc i64 [[SUB_N]] to i8469; CHECK-NEXT: [[ADD:%.*]] = add i64 [[IV]], [[SUB_N]]470; CHECK-NEXT: [[GEP:%.*]] = getelementptr i8, ptr [[DST]], i64 [[ADD]]471; CHECK-NEXT: store i8 [[SUB_N_TRUNC]], ptr [[GEP]], align 1472; CHECK-NEXT: [[IV_NEXT]] = add nsw i64 [[IV]], 1473; CHECK-NEXT: [[C:%.*]] = icmp sle i64 [[IV_NEXT]], 1000474; CHECK-NEXT: br i1 [[C]], label [[LOOP]], label [[EXIT]], !llvm.loop [[LOOP12:![0-9]+]]475; CHECK: exit:476; CHECK-NEXT: ret void477;478; IC2-LABEL: @test_loop2(479; IC2-NEXT: iter.check:480; IC2-NEXT: br i1 false, label [[VEC_EPILOG_SCALAR_PH:%.*]], label [[VECTOR_MAIN_LOOP_ITER_CHECK:%.*]]481; IC2: vector.main.loop.iter.check:482; IC2-NEXT: br i1 false, label [[VEC_EPILOG_PH:%.*]], label [[VECTOR_PH:%.*]]483; IC2: vector.ph:484; IC2-NEXT: br label [[VECTOR_BODY:%.*]]485; IC2: vector.body:486; IC2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]487; IC2-NEXT: [[TMP0:%.*]] = add i64 [[INDEX]], 0488; IC2-NEXT: [[TMP1:%.*]] = add i64 [[INDEX]], 1489; IC2-NEXT: [[TMP2:%.*]] = add i64 [[INDEX]], 2490; IC2-NEXT: [[TMP3:%.*]] = add i64 [[INDEX]], 3491; IC2-NEXT: [[TMP4:%.*]] = add i64 [[INDEX]], 4492; IC2-NEXT: [[TMP5:%.*]] = add i64 [[INDEX]], 5493; IC2-NEXT: [[TMP6:%.*]] = add i64 [[INDEX]], 6494; IC2-NEXT: [[TMP7:%.*]] = add i64 [[INDEX]], 7495; IC2-NEXT: [[TMP8:%.*]] = add i64 [[INDEX]], 8496; IC2-NEXT: [[TMP9:%.*]] = add i64 [[INDEX]], 9497; IC2-NEXT: [[TMP10:%.*]] = add i64 [[INDEX]], 10498; IC2-NEXT: [[TMP11:%.*]] = add i64 [[INDEX]], 11499; IC2-NEXT: [[TMP12:%.*]] = add i64 [[INDEX]], 12500; IC2-NEXT: [[TMP13:%.*]] = add i64 [[INDEX]], 13501; IC2-NEXT: [[TMP14:%.*]] = add i64 [[INDEX]], 14502; IC2-NEXT: [[TMP15:%.*]] = add i64 [[INDEX]], 15503; IC2-NEXT: [[TMP16:%.*]] = add i64 [[INDEX]], 16504; IC2-NEXT: [[TMP17:%.*]] = add i64 [[INDEX]], 17505; IC2-NEXT: [[TMP18:%.*]] = add i64 [[INDEX]], 18506; IC2-NEXT: [[TMP19:%.*]] = add i64 [[INDEX]], 19507; IC2-NEXT: [[TMP20:%.*]] = add i64 [[INDEX]], 20508; IC2-NEXT: [[TMP21:%.*]] = add i64 [[INDEX]], 21509; IC2-NEXT: [[TMP22:%.*]] = add i64 [[INDEX]], 22510; IC2-NEXT: [[TMP23:%.*]] = add i64 [[INDEX]], 23511; IC2-NEXT: [[TMP24:%.*]] = add i64 [[INDEX]], 24512; IC2-NEXT: [[TMP25:%.*]] = add i64 [[INDEX]], 25513; IC2-NEXT: [[TMP26:%.*]] = add i64 [[INDEX]], 26514; IC2-NEXT: [[TMP27:%.*]] = add i64 [[INDEX]], 27515; IC2-NEXT: [[TMP28:%.*]] = add i64 [[INDEX]], 28516; IC2-NEXT: [[TMP29:%.*]] = add i64 [[INDEX]], 29517; IC2-NEXT: [[TMP30:%.*]] = add i64 [[INDEX]], 30518; IC2-NEXT: [[TMP31:%.*]] = add i64 [[INDEX]], 31519; IC2-NEXT: [[TMP32:%.*]] = sub nsw i64 [[N:%.*]], [[TMP0]]520; IC2-NEXT: [[TMP33:%.*]] = sub nsw i64 [[N]], [[TMP1]]521; IC2-NEXT: [[TMP34:%.*]] = sub nsw i64 [[N]], [[TMP2]]522; IC2-NEXT: [[TMP35:%.*]] = sub nsw i64 [[N]], [[TMP3]]523; IC2-NEXT: [[TMP36:%.*]] = sub nsw i64 [[N]], [[TMP4]]524; IC2-NEXT: [[TMP37:%.*]] = sub nsw i64 [[N]], [[TMP5]]525; IC2-NEXT: [[TMP38:%.*]] = sub nsw i64 [[N]], [[TMP6]]526; IC2-NEXT: [[TMP39:%.*]] = sub nsw i64 [[N]], [[TMP7]]527; IC2-NEXT: [[TMP40:%.*]] = sub nsw i64 [[N]], [[TMP8]]528; IC2-NEXT: [[TMP41:%.*]] = sub nsw i64 [[N]], [[TMP9]]529; IC2-NEXT: [[TMP42:%.*]] = sub nsw i64 [[N]], [[TMP10]]530; IC2-NEXT: [[TMP43:%.*]] = sub nsw i64 [[N]], [[TMP11]]531; IC2-NEXT: [[TMP44:%.*]] = sub nsw i64 [[N]], [[TMP12]]532; IC2-NEXT: [[TMP45:%.*]] = sub nsw i64 [[N]], [[TMP13]]533; IC2-NEXT: [[TMP46:%.*]] = sub nsw i64 [[N]], [[TMP14]]534; IC2-NEXT: [[TMP47:%.*]] = sub nsw i64 [[N]], [[TMP15]]535; IC2-NEXT: [[TMP48:%.*]] = insertelement <16 x i64> poison, i64 [[TMP32]], i32 0536; IC2-NEXT: [[TMP49:%.*]] = insertelement <16 x i64> [[TMP48]], i64 [[TMP33]], i32 1537; IC2-NEXT: [[TMP50:%.*]] = insertelement <16 x i64> [[TMP49]], i64 [[TMP34]], i32 2538; IC2-NEXT: [[TMP51:%.*]] = insertelement <16 x i64> [[TMP50]], i64 [[TMP35]], i32 3539; IC2-NEXT: [[TMP52:%.*]] = insertelement <16 x i64> [[TMP51]], i64 [[TMP36]], i32 4540; IC2-NEXT: [[TMP53:%.*]] = insertelement <16 x i64> [[TMP52]], i64 [[TMP37]], i32 5541; IC2-NEXT: [[TMP54:%.*]] = insertelement <16 x i64> [[TMP53]], i64 [[TMP38]], i32 6542; IC2-NEXT: [[TMP55:%.*]] = insertelement <16 x i64> [[TMP54]], i64 [[TMP39]], i32 7543; IC2-NEXT: [[TMP56:%.*]] = insertelement <16 x i64> [[TMP55]], i64 [[TMP40]], i32 8544; IC2-NEXT: [[TMP57:%.*]] = insertelement <16 x i64> [[TMP56]], i64 [[TMP41]], i32 9545; IC2-NEXT: [[TMP58:%.*]] = insertelement <16 x i64> [[TMP57]], i64 [[TMP42]], i32 10546; IC2-NEXT: [[TMP59:%.*]] = insertelement <16 x i64> [[TMP58]], i64 [[TMP43]], i32 11547; IC2-NEXT: [[TMP60:%.*]] = insertelement <16 x i64> [[TMP59]], i64 [[TMP44]], i32 12548; IC2-NEXT: [[TMP61:%.*]] = insertelement <16 x i64> [[TMP60]], i64 [[TMP45]], i32 13549; IC2-NEXT: [[TMP62:%.*]] = insertelement <16 x i64> [[TMP61]], i64 [[TMP46]], i32 14550; IC2-NEXT: [[TMP63:%.*]] = insertelement <16 x i64> [[TMP62]], i64 [[TMP47]], i32 15551; IC2-NEXT: [[TMP64:%.*]] = sub nsw i64 [[N]], [[TMP16]]552; IC2-NEXT: [[TMP65:%.*]] = sub nsw i64 [[N]], [[TMP17]]553; IC2-NEXT: [[TMP66:%.*]] = sub nsw i64 [[N]], [[TMP18]]554; IC2-NEXT: [[TMP67:%.*]] = sub nsw i64 [[N]], [[TMP19]]555; IC2-NEXT: [[TMP68:%.*]] = sub nsw i64 [[N]], [[TMP20]]556; IC2-NEXT: [[TMP69:%.*]] = sub nsw i64 [[N]], [[TMP21]]557; IC2-NEXT: [[TMP70:%.*]] = sub nsw i64 [[N]], [[TMP22]]558; IC2-NEXT: [[TMP71:%.*]] = sub nsw i64 [[N]], [[TMP23]]559; IC2-NEXT: [[TMP72:%.*]] = sub nsw i64 [[N]], [[TMP24]]560; IC2-NEXT: [[TMP73:%.*]] = sub nsw i64 [[N]], [[TMP25]]561; IC2-NEXT: [[TMP74:%.*]] = sub nsw i64 [[N]], [[TMP26]]562; IC2-NEXT: [[TMP75:%.*]] = sub nsw i64 [[N]], [[TMP27]]563; IC2-NEXT: [[TMP76:%.*]] = sub nsw i64 [[N]], [[TMP28]]564; IC2-NEXT: [[TMP77:%.*]] = sub nsw i64 [[N]], [[TMP29]]565; IC2-NEXT: [[TMP78:%.*]] = sub nsw i64 [[N]], [[TMP30]]566; IC2-NEXT: [[TMP79:%.*]] = sub nsw i64 [[N]], [[TMP31]]567; IC2-NEXT: [[TMP80:%.*]] = insertelement <16 x i64> poison, i64 [[TMP64]], i32 0568; IC2-NEXT: [[TMP81:%.*]] = insertelement <16 x i64> [[TMP80]], i64 [[TMP65]], i32 1569; IC2-NEXT: [[TMP82:%.*]] = insertelement <16 x i64> [[TMP81]], i64 [[TMP66]], i32 2570; IC2-NEXT: [[TMP83:%.*]] = insertelement <16 x i64> [[TMP82]], i64 [[TMP67]], i32 3571; IC2-NEXT: [[TMP84:%.*]] = insertelement <16 x i64> [[TMP83]], i64 [[TMP68]], i32 4572; IC2-NEXT: [[TMP85:%.*]] = insertelement <16 x i64> [[TMP84]], i64 [[TMP69]], i32 5573; IC2-NEXT: [[TMP86:%.*]] = insertelement <16 x i64> [[TMP85]], i64 [[TMP70]], i32 6574; IC2-NEXT: [[TMP87:%.*]] = insertelement <16 x i64> [[TMP86]], i64 [[TMP71]], i32 7575; IC2-NEXT: [[TMP88:%.*]] = insertelement <16 x i64> [[TMP87]], i64 [[TMP72]], i32 8576; IC2-NEXT: [[TMP89:%.*]] = insertelement <16 x i64> [[TMP88]], i64 [[TMP73]], i32 9577; IC2-NEXT: [[TMP90:%.*]] = insertelement <16 x i64> [[TMP89]], i64 [[TMP74]], i32 10578; IC2-NEXT: [[TMP91:%.*]] = insertelement <16 x i64> [[TMP90]], i64 [[TMP75]], i32 11579; IC2-NEXT: [[TMP92:%.*]] = insertelement <16 x i64> [[TMP91]], i64 [[TMP76]], i32 12580; IC2-NEXT: [[TMP93:%.*]] = insertelement <16 x i64> [[TMP92]], i64 [[TMP77]], i32 13581; IC2-NEXT: [[TMP94:%.*]] = insertelement <16 x i64> [[TMP93]], i64 [[TMP78]], i32 14582; IC2-NEXT: [[TMP95:%.*]] = insertelement <16 x i64> [[TMP94]], i64 [[TMP79]], i32 15583; IC2-NEXT: [[TMP96:%.*]] = trunc <16 x i64> [[TMP63]] to <16 x i8>584; IC2-NEXT: [[TMP97:%.*]] = trunc <16 x i64> [[TMP95]] to <16 x i8>585; IC2-NEXT: [[TMP98:%.*]] = add i64 [[TMP0]], [[TMP32]]586; IC2-NEXT: [[TMP99:%.*]] = add i64 [[TMP16]], [[TMP64]]587; IC2-NEXT: [[TMP100:%.*]] = getelementptr i8, ptr [[DST:%.*]], i64 [[TMP98]]588; IC2-NEXT: [[TMP101:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP99]]589; IC2-NEXT: [[TMP102:%.*]] = extractelement <16 x i8> [[TMP96]], i32 15590; IC2-NEXT: [[TMP103:%.*]] = extractelement <16 x i8> [[TMP97]], i32 15591; IC2-NEXT: store i8 [[TMP102]], ptr [[TMP100]], align 1592; IC2-NEXT: store i8 [[TMP103]], ptr [[TMP101]], align 1593; IC2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 32594; IC2-NEXT: [[TMP104:%.*]] = icmp eq i64 [[INDEX_NEXT]], 992595; IC2-NEXT: br i1 [[TMP104]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP9:![0-9]+]]596; IC2: middle.block:597; IC2-NEXT: br i1 false, label [[EXIT:%.*]], label [[VEC_EPILOG_ITER_CHECK:%.*]]598; IC2: vec.epilog.iter.check:599; IC2-NEXT: br i1 false, label [[VEC_EPILOG_SCALAR_PH]], label [[VEC_EPILOG_PH]], !prof [[PROF10:![0-9]+]]600; IC2: vec.epilog.ph:601; IC2-NEXT: [[VEC_EPILOG_RESUME_VAL:%.*]] = phi i64 [ 992, [[VEC_EPILOG_ITER_CHECK]] ], [ 0, [[VECTOR_MAIN_LOOP_ITER_CHECK]] ]602; IC2-NEXT: br label [[VEC_EPILOG_VECTOR_BODY:%.*]]603; IC2: vec.epilog.vector.body:604; IC2-NEXT: [[INDEX1:%.*]] = phi i64 [ [[VEC_EPILOG_RESUME_VAL]], [[VEC_EPILOG_PH]] ], [ [[INDEX_NEXT2:%.*]], [[VEC_EPILOG_VECTOR_BODY]] ]605; IC2-NEXT: [[TMP105:%.*]] = add i64 [[INDEX1]], 0606; IC2-NEXT: [[TMP106:%.*]] = add i64 [[INDEX1]], 1607; IC2-NEXT: [[TMP107:%.*]] = add i64 [[INDEX1]], 2608; IC2-NEXT: [[TMP108:%.*]] = add i64 [[INDEX1]], 3609; IC2-NEXT: [[TMP109:%.*]] = add i64 [[INDEX1]], 4610; IC2-NEXT: [[TMP110:%.*]] = add i64 [[INDEX1]], 5611; IC2-NEXT: [[TMP111:%.*]] = add i64 [[INDEX1]], 6612; IC2-NEXT: [[TMP112:%.*]] = add i64 [[INDEX1]], 7613; IC2-NEXT: [[TMP113:%.*]] = sub nsw i64 [[N]], [[TMP105]]614; IC2-NEXT: [[TMP114:%.*]] = sub nsw i64 [[N]], [[TMP106]]615; IC2-NEXT: [[TMP115:%.*]] = sub nsw i64 [[N]], [[TMP107]]616; IC2-NEXT: [[TMP116:%.*]] = sub nsw i64 [[N]], [[TMP108]]617; IC2-NEXT: [[TMP117:%.*]] = sub nsw i64 [[N]], [[TMP109]]618; IC2-NEXT: [[TMP118:%.*]] = sub nsw i64 [[N]], [[TMP110]]619; IC2-NEXT: [[TMP119:%.*]] = sub nsw i64 [[N]], [[TMP111]]620; IC2-NEXT: [[TMP120:%.*]] = sub nsw i64 [[N]], [[TMP112]]621; IC2-NEXT: [[TMP121:%.*]] = insertelement <8 x i64> poison, i64 [[TMP113]], i32 0622; IC2-NEXT: [[TMP122:%.*]] = insertelement <8 x i64> [[TMP121]], i64 [[TMP114]], i32 1623; IC2-NEXT: [[TMP123:%.*]] = insertelement <8 x i64> [[TMP122]], i64 [[TMP115]], i32 2624; IC2-NEXT: [[TMP124:%.*]] = insertelement <8 x i64> [[TMP123]], i64 [[TMP116]], i32 3625; IC2-NEXT: [[TMP125:%.*]] = insertelement <8 x i64> [[TMP124]], i64 [[TMP117]], i32 4626; IC2-NEXT: [[TMP126:%.*]] = insertelement <8 x i64> [[TMP125]], i64 [[TMP118]], i32 5627; IC2-NEXT: [[TMP127:%.*]] = insertelement <8 x i64> [[TMP126]], i64 [[TMP119]], i32 6628; IC2-NEXT: [[TMP128:%.*]] = insertelement <8 x i64> [[TMP127]], i64 [[TMP120]], i32 7629; IC2-NEXT: [[TMP129:%.*]] = trunc <8 x i64> [[TMP128]] to <8 x i8>630; IC2-NEXT: [[TMP130:%.*]] = add i64 [[TMP105]], [[TMP113]]631; IC2-NEXT: [[TMP131:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP130]]632; IC2-NEXT: [[TMP132:%.*]] = extractelement <8 x i8> [[TMP129]], i32 7633; IC2-NEXT: store i8 [[TMP132]], ptr [[TMP131]], align 1634; IC2-NEXT: [[INDEX_NEXT2]] = add nuw i64 [[INDEX1]], 8635; IC2-NEXT: [[TMP133:%.*]] = icmp eq i64 [[INDEX_NEXT2]], 1000636; IC2-NEXT: br i1 [[TMP133]], label [[VEC_EPILOG_MIDDLE_BLOCK:%.*]], label [[VEC_EPILOG_VECTOR_BODY]], !llvm.loop [[LOOP11:![0-9]+]]637; IC2: vec.epilog.middle.block:638; IC2-NEXT: br i1 false, label [[EXIT]], label [[VEC_EPILOG_SCALAR_PH]]639; IC2: vec.epilog.scalar.ph:640; IC2-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 1000, [[VEC_EPILOG_MIDDLE_BLOCK]] ], [ 992, [[VEC_EPILOG_ITER_CHECK]] ], [ 0, [[ITER_CHECK:%.*]] ]641; IC2-NEXT: br label [[LOOP:%.*]]642; IC2: loop:643; IC2-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[VEC_EPILOG_SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]644; IC2-NEXT: [[SUB_N:%.*]] = sub nsw i64 [[N]], [[IV]]645; IC2-NEXT: [[SUB_N_TRUNC:%.*]] = trunc i64 [[SUB_N]] to i8646; IC2-NEXT: [[ADD:%.*]] = add i64 [[IV]], [[SUB_N]]647; IC2-NEXT: [[GEP:%.*]] = getelementptr i8, ptr [[DST]], i64 [[ADD]]648; IC2-NEXT: store i8 [[SUB_N_TRUNC]], ptr [[GEP]], align 1649; IC2-NEXT: [[IV_NEXT]] = add nsw i64 [[IV]], 1650; IC2-NEXT: [[C:%.*]] = icmp sle i64 [[IV_NEXT]], 1000651; IC2-NEXT: br i1 [[C]], label [[LOOP]], label [[EXIT]], !llvm.loop [[LOOP12:![0-9]+]]652; IC2: exit:653; IC2-NEXT: ret void654;655entry:656 br label %loop657 658loop:659 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]660 %sub.n = sub nsw i64 %n, %iv661 %sub.n.trunc = trunc i64 %sub.n to i8662 %add = add i64 %iv, %sub.n663 %gep = getelementptr i8, ptr %dst, i64 %add664 store i8 %sub.n.trunc, ptr %gep, align 1665 %iv.next = add nsw i64 %iv, 1666 %c = icmp sle i64 %iv.next, 1000667 br i1 %c, label %loop, label %exit668 669exit:670 ret void671}672 673attributes #0 = { "target-features"="+neon,+sve" vscale_range(1, 16) }674 675!0 = distinct !{!0, !1, !2, !3, !4, !5}676!1 = !{!"llvm.loop.mustprogress"}677!2 = !{!"llvm.loop.vectorize.width", i32 4}678!3 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}679!4 = !{!"llvm.loop.vectorize.enable", i1 true}680!5 = !{!"llvm.loop.interleave.count", i32 1}681 682